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path: root/src/mesa/drivers/dri/i965/brw_tex.c
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2008-01-10[intel] Add more cliprect modes to cover other meanings for batch emits.Eric Anholt
The previous change gave us only two modes, one which looped over the batch per cliprect (3d drawing) and one that didn't (state updeast). However, we really want 4: - Batch doesn't care about cliprects (state updates) - Batch needs DRAWING_RECTANGLE looping per cliprect (3d drawing) - Batch needs to be executed just once (region fills, copies, etc.) - Batch already includes cliprect handling, and must be flushed by unlock time (copybuffers, clears). All callers should now be fixed to use one of these states for any batchbuffer emits. Thanks to Keith Whitwell for pointing out the failure.
2007-11-20[965] Replace 965 texture format code with common code.Eric Anholt
The only functional difference should be that 965 now gets the optimization where textures default to 16bpp when the screen is 16bpp.
2007-08-10i965: roland's DXTn format texture patch(bug10347)Xiang, Haihao
2007-08-02 Fix previous commitZou Nan hai
2007-08-02 EXT_texture_sRGB support on i965Zou Nan hai
2007-03-20fix for bug#10347Xiang, Haihao
not sure which brw surface for DXT3 & DXT5, so restore the previous choice.(changed in commit 84081774e62a8af18e6bf894ea69f63b97dcfe96)
2007-03-18i965: fix for FXT1 & S3TC texture formatXiang, Haihao
choose the right mesa texformat for FXT1 & S3TC
2006-11-29Add accelerated CopyPixels for non-overlapping, 1:1 blits.Eric Anholt
Submitted by Gary Wong <gtw@gnu.org>
2006-09-21Do a better job of choosing texture formats to avoid image conversions.Keith Whitwell
2006-09-21use the requested internal texture format where possibleKeith Whitwell
2006-09-20Support ARB_texture_rectangle.Keith Whitwell
2006-08-09Add Intel i965G/Q DRI driver.Eric Anholt
This driver comes from Tungsten Graphics, with a few further modifications by Intel.