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path: root/src/mesa/drivers/dri/i965/brw_tex_layout.c
AgeCommit message (Expand)Author
2011-01-10Revert "intel: Always allocate miptrees from level 0, not tObj->BaseLevel."Eric Anholt
2011-01-05intel: Always allocate miptrees from level 0, not tObj->BaseLevel.Eric Anholt
2010-09-28i965: Fix sampler on sandybridgeZhenyu Wang
2010-04-29i965: Fix cube map layouts on Ironlake.Eric Anholt
2010-04-21intel: Clean up chipset name and gen num for IronlakeZhenyu Wang
2010-03-17intel: Replace mt->pitch with mt->region->pitch.Eric Anholt
2010-01-30i965: Remove unnecessary headers.Vinson Lee
2009-12-22intel: Replace IS_IGDNG checks with intel->is_ironlake or needs_ff_sync.Eric Anholt
2009-10-23intel: Keep track of x,y offsets in miptrees and use them for blitting.Eric Anholt
2009-08-19intel: Fix failure to commit -a --amend before last push.Eric Anholt
2009-08-19intel: Align cubemap texture height to its padding requirements.Eric Anholt
2009-08-13i965: fix cube map on IGDNGXiang, Haihao
2009-07-13i965: add support for new chipsetsXiang, Haihao
2009-06-17i965: Fix up texture layout for small things with wide pitches (tiled)Eric Anholt
2009-06-04intel: Add support for tiled textures.Eric Anholt
2009-05-21i965: fix whitespace in brw_tex_layout.cEric Anholt
2008-09-18mesa: added "main/" prefix to includes, remove some -I paths from Makefile.te...Brian Paul
2007-12-18[INTEL] Fix 965 to use new centralized mipmap pitch functionKeith Packard
2007-12-07[965] Convert the driver to dri_bufmgr interface and enable TTM.Eric Anholt
2007-11-19[965] Convert DBG macro to use FILE_DEBUG_FLAG like i915.Eric Anholt
2007-10-04[965] Replace various alignment code with a shared ALIGN() macro.Eric Anholt
2007-08-17i965: align width/height for volume textureXiang, Haihao
2006-12-14Share code to lay out >= 945 style 2D mipmaps between i915tex and i965 drivers.Michel Dänzer
2006-09-20Support ARB_texture_rectangle.Keith Whitwell
2006-08-09Add Intel i965G/Q DRI driver.Eric Anholt