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path: root/src/mesa/drivers/dri/i965/brw_vs_emit.c
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2010-09-07i965: Store the byte address in the VS constant buffer as an integer.Eric Anholt
We carefully multiplied our two ints (since we want to be precise after all) then stored them in a float, which is not specced to really work, in addition to wasting precision. Fixes vp-arl-constant-array-huge-* things since the assertions were added.
2010-09-07i965: set the source width/stride when handling reladdr dests in the VS.Eric Anholt
This is a requirement specified in the docs. No behavior change in glsl-vs-varying-array.shader_test that violated these requirements.
2010-08-30i965: Clear the cached constant buffer entry in the VS at control flow.Eric Anholt
Fixes the 7 regressions with constant buffers forced on with piglit -t glsl (glsl-vs-if-*).
2010-08-30i965: Make brw_CONT and brw_BREAK take the pop count.Eric Anholt
We always need to set it, so pass it in.
2010-08-26i965: Add support for destination RelAddr writes in the VS.Eric Anholt
Fixes: glsl-vs-varying-array
2010-08-20i965: Add AccWrCtl support on Sandybridge.Zhenyu Wang
Whenever the accumulator results are needed, this bit must be set.
2010-08-18i965: Set the if stack pop count when breaking out of a loop inside an if.Eric Anholt
Otherwise, we might end up with the if stack pointing at the wrong place. Fixes GPU hang with glsl-vs-if-loop.
2010-08-18i965: Don't set the swizzle on an immediate value in the VS.Eric Anholt
Fixes glsl-vs-if-nested (70.0 is not <= 70.000648 thanks to the swizzle bits getting set). Some safety checks are added to make sure this doesn't happen again as we increase the usage of immediate values in program generation.
2010-08-17i965: Add support for DP2 in the VS.Eric Anholt
Fixes glsl-vs-dot-vec2.
2010-08-09i965: More s/stderr/stdout/ for program debug.Eric Anholt
2010-08-04i965: Settle on printing our program debug to stdout.Eric Anholt
Mixing stderr (_mesa_print_program, _mesa_print_instruction, _mesa_print_alu) with stdout means that when writing both to a file, there isn't a consistent ordering between the two.
2010-07-26Merge remote branch 'origin/master' into glsl2Eric Anholt
This pulls in multiple i965 driver fixes which will help ensure better testing coverage during development, and also gets past the conflicts of the src/mesa/shader -> src/mesa/program move. Conflicts: src/mesa/Makefile src/mesa/main/shaderapi.c src/mesa/main/shaderobj.h
2010-07-26i965: Allow VS MOVs to use immediate constants.Eric Anholt
Clarifies program assembly, and with a little tweak to always use constant_map, we could cut down on constant buffer payload.
2010-07-23i965: Add support for VS relative addressing of temporary arrays.Eric Anholt
Fixes glsl-vs-arrays. Bug #27388.
2010-07-22i965: Avoid extra MOV in VS indirect register reads.Eric Anholt
2010-07-22i965: Fix up VS temporary array access for fixed index offset != 0.Eric Anholt
2010-07-21i965: In the VS, multiply the address reg by the appropriate register size.Eric Anholt
The ARL value is increments of vec4 in the register file. But PROGRAM_TEMPORARY or PROGRAM_INPUT are stored as vec4s interleaved between the two verts being executed (thus a vec8 each), compared to PROGRAM_STATE_VAR being packed vec4s. Fixes: glsl-vs-arrays-2 glsl-vs-mov-after-deref (without regressing glsl-vs-arrays-3)
2010-07-21i965: Clean up brw_dp_READ_4_vs() now that it has fewer options to support.Eric Anholt
2010-07-21i965: Support relative addressed VS constant reads using the appropriate msg.Eric Anholt
The previous support was overly complicated by trying to use the same 1-OWORD message for both offsets.
2010-07-21i965: Clean up dead code from the VS get_constant/get_reladdr_constant split.Eric Anholt
2010-07-21i965: Remove an unused variable.Carl Worth
To quiet a compiler warning.
2010-07-19i965: Mostly fix glsl-max-varyings.Eric Anholt
There was confusion on both the size of message we can send, and on what the URB destination offset means. The remaining problems appear to be due to spilling of regs in the fragment shader being broken.
2010-07-19i965: Clean up message register setup in emit_vertex_write().Eric Anholt
2010-07-19i965: Don't set up VUE space for the disabled user clip distances on gen6.Eric Anholt
2010-06-30i965: Add support for OPCODE_SSG.Eric Anholt
The old compiler didn't use SSG, and instead emitted SGT/SGT/SUB. We can do a little better for SSG than we do for the SGT series.
2010-06-10mesa: rename src/mesa/shader/ to src/mesa/program/Brian Paul
2010-05-14i965: Dump out the correct shared function for SEND on Ironlake.Eric Anholt
2010-04-29i965: Implement VS MAX in a more obvious way.Eric Anholt
This should be functionally equivalent, with the possible exception of NaN handling.
2010-04-29i965: Use immediate float operands for some VS instructions.Eric Anholt
We could use this to reduce constant register pressure, but for now it makes the resulting program assembly much more readable.
2010-04-21intel: Clean up chipset name and gen num for IronlakeZhenyu Wang
Rename old IGDNG to Ironlake, and set 'gen' number for Ironlake as 5, so tracking the features with generation num instead of special is_ironlake flag. Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2010-04-17i965: Assert that an OPCODE_IF was seen before an OPCODE_ELSE.Vinson Lee
2010-03-22i965: Remove gratuitous jump or nop from OPCODE_END to vertex emit.Eric Anholt
Just emit the URB write at END time. Subroutine code that sits after OPCODE_END won't be executed since we've ended the thread at the point that the URB write is done.
2010-03-16Revert "i965: Do VS SGT, SLT, and friends using CMP, SEL instead of CMP, ↵Eric Anholt
MOV, MOV." This reverts commit 8ef3b1834a896927bdd4f2aea552cdb732849da9. Fixes piglit glsl-vs-if.
2010-03-12i965: Do VS SGT, SLT, and friends using CMP, SEL instead of CMP, MOV, MOV.Eric Anholt
2010-03-12i965: Fix up VS DP4 sequences to avoid dependency control.Eric Anholt
This is recommended by the B-Spec. I wasn't able to measure any difference in ETQW.
2010-03-09i965: Fix nested loops in the VS.Eric Anholt
We were patching up all the break and continues between the start of our loop and the end of our loop, even if they were breaks/continues for an inner loop. Avoiding patching already patched breaks/continues fixes piglit glsl-vs-loop-nested.
2010-03-03i965: Fix up Sandybridge VS sizing.Eric Anholt
2010-02-25i965: Fix up the VUE handling for SNB, and hopefully clarify comments.Eric Anholt
2010-02-25i965: Lump SNB in with Ironlake for bigger VUEs.Eric Anholt
This gets the VS to the point of accepting vertices. \o/
2010-02-25i965: Add SNB math opcode support.Eric Anholt
This is untested at this point.
2010-02-19Replace the _mesa_*printf() wrappers with the plain libc versionsKristian Høgsberg
2010-01-31i965: Silence uninitialized variable warning.Vinson Lee
2010-01-19i965: Upload as many VS constants as possible through the push constants.Eric Anholt
The pull constants require sending out to an overworked shared unit and waiting for a response, while push constants are nicely loaded in for us at thread dispatch time. By putting things we access in every VS invocation there, ETQW performance improved by 2.5% +/- 1.6% (n=6).
2010-01-18i965: Clean up constbuf handling by splitting reladdr/non-reladdr loads.Eric Anholt
The codepaths in the function were almost entirely different.
2010-01-18i965: Only set up the stack register if it's going to get used.Eric Anholt
2010-01-18i965: Fix loads of non-relative-addr constants after a reladdr load.Eric Anholt
Fixes piglit vp-arl-constant-array-huge-overwritten.
2009-12-22intel: Replace IS_965 checks with context structure usage.Eric Anholt
Saves another 600 bytes or so of code.
2009-12-22intel: Replace IS_IGDNG checks with intel->is_ironlake or needs_ff_sync.Eric Anholt
Saves ~480 bytes of code.
2009-12-18i965: Add support for OPCODE_CMP in the VS to fix GLSL sqrt()Eric Anholt
Bug #25628. Fixes piglit case glsl-vs-sqrt-zero.
2009-11-17Merge branch 'outputswritten64'Ian Romanick
Add a GLbitfield64 type and several macros to operate on 64-bit fields. The OutputsWritten field of gl_program is changed to use that type. This results in a fair amount of fallout in drivers that use programs. No changes are strictly necessary at this point as all bits used are below the 32-bit boundary. Fairly soon several bits will be added for clip distances written by a vertex shader. This will cause several bits used for varyings to be pushed above the 32-bit boundary. This will affect any drivers that support GLSL. At this point, only the i965 driver has been modified to support this eventuality. I did this as a "squash" merge. There were several places through the outputswritten64 branch where things were broken. I foresee this causing difficulties later for bisecting. The history is still available in the branch. Conflicts: src/mesa/drivers/dri/i965/brw_wm.h
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