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2010-09-30dri/i965: remove duplicated includeNicolas Kaiser
Remove duplicated include. Signed-off-by: Brian Paul <brianp@vmware.com>
2010-08-22i965: Fix up WM push constant setup on gen6.Eric Anholt
Fixes glsl-algebraic-add-add-1.
2010-06-11i965: Split constant buffer setup from its surface state/binding state.Eric Anholt
This was bothering me when redoing the binding tables.
2010-06-09i965: Avoid calloc/free in the CURBE upload process.Eric Anholt
In exchange we end up with an extra memcpy, but that seems better than calloc/free. Each buffer is 4k maximum, and on the i965-streaming branch this allocation was showing up as the top entry in brw_validate_state profiling for cairo-gl.
2010-06-08intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.Eric Anholt
The slightly less mechanical change of converting the emit_reloc calls will follow.
2010-03-04intel: Remove non-kernel-exec-fencing support.Eric Anholt
Shaves 60k off the driver from removing the broken spans code. This means we now require 2.6.29, which seems fair given that it's a year old and we've removed support for non-KMS already in the last release of 2D.
2010-02-25i965: Free gen6 state BOs on context destroy.Eric Anholt
2010-02-19Replace _mesa_malloc, _mesa_calloc and _mesa_free with plain libc versionsKristian Høgsberg
2010-02-06i965: Keep the CURBE BO mapped and memcpy instead of subdataing.Eric Anholt
For the tiny bis of data we generally upload through the CURBEs, the overhead of the kernel's pagetable trickery is actually rather high. This improves cairo-gl gnome-terminal-vim performance by 3.8%.
2010-01-25Merge branch 'mesa_7_7_branch'Brian Paul
Conflicts: src/mesa/drivers/dri/intel/intel_screen.c src/mesa/drivers/dri/intel/intel_swapbuffers.c src/mesa/drivers/dri/r300/r300_emit.c src/mesa/drivers/dri/r300/r300_ioctl.c src/mesa/drivers/dri/r300/r300_tex.c src/mesa/drivers/dri/r300/r300_texstate.c
2010-01-22i965: Remove unnecessary headers.Vinson Lee
2010-01-19intel: Remove dead note_fence vtbl hook.Eric Anholt
2009-11-23Merge commit 'origin/mesa_7_7_branch'Maciej Cencora
2009-11-21i965: Fix several memory leaks on exit.Eric Anholt
Bug #25194.
2009-11-19intel: Consistently use no_batch_wrap in intel_context struct.Eric Anholt
2009-11-06intel: Use PIPE_CONTROL on gen4 hardware for doing pipeline flushing.Eric Anholt
This should do all the things that MI_FLUSH did, but it can be pipelined so that further rendering isn't blocked on the flush completion unless necessary.
2009-09-28intel: Remove some dead metaops code.Eric Anholt
2009-06-29intel: Move note_unlock() implementation to the one place it's needed.Eric Anholt
2009-06-23i965: Don't set a reserved bit in MI_FLUSH.Eric Anholt
I noticed this when this MI_FLUSH showed up in IPEHR for the ut2004 hang. Not setting the reserved bit didn't help, though.
2009-04-14i965: checkpoint commit: VS constant buffersBrian Paul
Hook up a constant buffer, binding table, etc for the VS unit. This will allow using large constant buffers with vertex shaders. The new code is disabled at this time (use_const_buffer=FALSE).
2009-03-05i965: Remove dead flushing code.Eric Anholt
2009-02-26i965: rename draw_regions -> color_regionsroot
Be a little more specific about what these are.
2009-02-17intel: Clean up several 965 memory leaks on context destroy.Eric Anholt
2009-02-02i965: Delete old metaops code now that there are no remaining consumers.Eric Anholt
2009-01-30i965: formatting, comments, whitespace clean-upsBrian Paul
2008-11-28i965: Remove BRW_WM_LOCK dirty bit, introduced to work around lack of relocs.Eric Anholt
This was causing a prepare of wm state at every primitive emit.
2008-10-27i965: Fix compiler warning from unused var.Eric Anholt
2008-10-07i965: Add ARB_occlusion_query support.Eric Anholt
2008-09-28Remove TNL-to-VP tracking from i965Ian Romanick
The i965 driver previously had it's own set of code to convert fixed-function TNL state to a vertex program. Core Mesa has code to do this, so there is no reason to duplicate that effort in the driver. In fact, this duplication leads to bugs when other aspects of the Mesa infrastructure change.
2008-09-26intel: Fix a number of memory leaks on context destroy.Eric Anholt
2008-09-23i965: Cope with batch getting flushed in the middle of batchbuffer emits.Eric Anholt
This isn't required for GEM (at least, yet), but the check_aperture code for non-GEM results in batch getting flushed during emit. brw_state_upload restarts state emits, but a bunch of the state emit functions were assuming that they would be called exactly once, after prepare and before new_batch. Bug #17179.
2008-09-18mesa: added "main/" prefix to includes, remove some -I paths from ↵Brian Paul
Makefile.template
2008-09-03intel: Fix refcounting on depth buffer initialization in DRI2.Eric Anholt
(Reverts a change to work around the problem on 965).
2008-08-29DRI2: Drop sarea, implement swap buffers in the X server.Kristian Høgsberg
2008-03-13 [i965] multiple rendering target supportZou Nan hai
2008-02-04[965] Convert brw_draw_upload to managing dri_bos, not gl_buffer_objects.Eric Anholt
This helps us avoid a bunch of mess with gl_client_arrays that we filled with unused data and confused readers.
2008-01-14[965] Force a new vertex upload buffer at new batch time.Eric Anholt
Otherwise, we could choose to upload into the temporary VBO that we just fired off to the hardware. Good for a 60% OA performance improvement.
2008-01-10[965] Improve performance by allocating CURBE buffers a page at a time.Eric Anholt
Since each one is only 64b, and kernel allocations are a page anyway, this lets us reduce buffer allocation by packing many CURBEs into one buffer, for each batchbuffer submitted. Improves openarena performance by around 10%.
2008-01-09[965] Allow more than one draw_prims per batchbuffer.Eric Anholt
The comment about (vbo)_exec_api.c appeared to be stale, as the VBO code seems to only use non-named VBOs (not actual VBOs) or freshly-allocated VBO data. This brings a 2x speedup to openarena, because we can submit nearly-full batchbuffers instead of many 450-byte ones.
2008-01-09[965] Replace the always_update dirty flag with BRW_NEW_BATCH.Eric Anholt
This allows us to avoid re-emitting some state when validate_state happens multiple times per batchbuffer. Even though we flush batch per primitive currently, that may still happen already if the primitive changed (this should probably be fixed as well).
2008-01-09[intel] Rename lost_hardware vtbl entry to new_batch.Eric Anholt
Both drivers have ended up relying on lost_hardware being called after each batch buffer, so update the name. This removes one of the calls on 965 whic h was outside of the batchbuffer handling code and just duplicating what had already happened through batchbuffer handling.
2007-12-15[965] Use shared intel_regions.c.Eric Anholt
This adds (so far) unused PBO functions, and holding the lock while writing to regions (which may be shared static screen regions).
2007-12-14[965] Replace the state cache suballocator with direct dri_bufmgr use.Eric Anholt
The user-space suballocator that was used avoided relocation computations by using the general and surface state base registers and allocating those types of buffers out of pools built on top of single buffer objects. It also avoided calls into the buffer manager for these small state allocations, since only one buffer object was being used. However, the buffer allocation cost appears to be low, and with relocation caching, computing relocations for buffers is essentially free. Additionally, implementing the suballocator required a don't-fence-subdata flag to disable waiting on buffer maps so that writing new data didn't block on rendering using old data, and careful handling when mapping to update old data (which we need to do for unavoidable relocations with FBOs). More importantly, when the suballocator filled, it had no replacement algorithm and just threw out all of the contents and forced them to be recomputed, which is a significant cost. This is the first step, which just changes the buffer type, but doesn't yet improve the hash table to not result in full recompute on overflow. Because the buffers are all allocated out of the general buffer allocator, we can no longer use the general/surface state bases to avoid relocations, and they are set to 0 instead.
2007-12-07[965] Convert the driver to dri_bufmgr interface and enable TTM.Eric Anholt
This is currently believed to work but be a significant performance loss. Performance recovery should be soon to follow. The dri_bo_fake_disable_backing_store() call was added to allow backing store disable like bufmgr_fake.c did, which is a significant performance win (though it's missing the no-fence-subdata part). This commit is a squash merge of the 965-ttm branch, which had some history I wanted to avoid pulling due to noisiness and brokenness at many points for git-bisecting.
2007-09-27[965] Remove AUB file support.Eric Anholt
This code existed to dump logs of hardware access to be replayed in simulation. Since we have real hardware now, it's not really needed.
2007-01-16Merge branch 'master' of git+ssh://keithw@git.freedesktop.org/git/mesa/mesa ↵Keith Whitwell
into vbo-0.2 Conflicts: src/mesa/array_cache/sources src/mesa/drivers/dri/i965/brw_context.c src/mesa/drivers/dri/i965/brw_draw.c src/mesa/drivers/dri/i965/brw_fallback.c src/mesa/drivers/dri/i965/brw_vs_emit.c src/mesa/drivers/dri/i965/brw_vs_tnl.c src/mesa/drivers/dri/mach64/mach64_context.c src/mesa/main/extensions.c src/mesa/main/getstring.c src/mesa/tnl/sources src/mesa/tnl/t_save_api.c src/mesa/tnl/t_save_playback.c src/mesa/tnl/t_vtx_api.c src/mesa/tnl/t_vtx_exec.c src/mesa/vbo/vbo_attrib.h src/mesa/vbo/vbo_exec_api.c src/mesa/vbo/vbo_save_api.c src/mesa/vbo/vbo_save_draw.c
2006-11-29Add accelerated CopyPixels for non-overlapping, 1:1 blits.Eric Anholt
Submitted by Gary Wong <gtw@gnu.org>
2006-10-31cleanup code, compiles with vbo changesKeith Whitwell
2006-09-07Make sure bmBufferOffset is called for all active buffers every timeKeith Whitwell
we render. Currenly requires that some state be re-examined after every LOCK_HARDWARE().
2006-08-09Add Intel i965G/Q DRI driver.Eric Anholt
This driver comes from Tungsten Graphics, with a few further modifications by Intel.