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path: root/src/mesa/drivers/dri/i965/brw_wm.c
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2009-05-14i965: Fix register allocation of GLSL fp inputs.Eric Anholt
Before, if the VP output something that is in the attributes coming into the WM but which isn't used by the WM, then WM would end up reading subsequent varyings from the wrong places. This was visible with a GLSL demo using gl_PointSize in the VS and a varying in the WM, as point size is in the VUE but not used by the WM. There is now a regression test in piglit, glsl-unused-varying.
2009-05-08i965: fix segfault on low memory conditionsRobert Ellison
When out of memory (in at least one case, triggered by a longrunning memory leak), this code will segfault and crash. By checking for the out-of-memory condition, the system can continue, and will report the out-of-memory error later, a much preferable outcome.
2009-04-03i965: commentsBrian Paul
2009-03-23i965: Fix glFrontFacing in twoside GLSL demo.Eric Anholt
This also cuts instructions by just using the existing bit in the payload rather than computing it from the determinant in the SF unit and passing it as a varying down to the WM. Something still goes wrong with getting the backface color right, but a simpler shader appears to get the right result.
2009-03-06i965: avoid unnecessary calls to brw_wm_is_glsl()Brian Paul
This function scans the shader to see if it has any GLSL features like conditionals and loops. Calling this during state validation is expensive. Just call it when the shader is given to the driver and save the result. There's some new/temporary assertions to be sure we don't get out of sync on this.
2009-03-02mesa: use Stencil._Enabled field instead of Stencil.EnabledBrian Paul
2009-02-28mesa: rename, reorder FRAG_RESULT_x tokensBrian Paul
s/FRAG_RESULT_DEPR/FRAG_RESULT_DEPTH/ s/FRAG_RESULT_COLR/FRAG_RESULT/COLOR/ Remove FRAG_RESULT_COLH (NV half-precision) output since we never used it. Next, we might merge the COLOR and DATA outputs (COLOR0, COLOR1, etc).
2009-02-20i965: update comment, use const qualifierBrian Paul
2009-02-13i965: code clean-ups, comments, and minor refactoringBrian Paul
2009-02-13i965: fix inconsistant indentation in brw_wm.cBrian Paul
2009-02-02i965: Remove brw->attribs now that we can just always look in the GLcontext.Eric Anholt
2009-01-28i965: implement GL_EXT_texture_swizzleBrian Paul
If the texture swizzle is not XYZW (no-op) add an extra MOV instruction after the TEX instruction to rearrange the components.
2009-01-28i965: minor improvements in brw_wm_populate_key()Brian Paul
2009-01-23Track two sets of back-face stencil stateIan Romanick
Track separate back-face stencil state for OpenGL 2.0 / GL_ATI_separate_stencil and GL_EXT_stencil_two_side. This allows all three to be enabled in a driver. One set of state is set via the 2.0 or ATI functions and is used when STENCIL_TEST_TWO_SIDE_EXT is disabled. The other is set by StencilFunc and StencilOp when the active stencil face is set to BACK. The GL_EXT_stencil_two_side spec has more details. http://opengl.org/registry/specs/EXT/stencil_two_side.txt
2009-01-21i965: Remove gratuitous whitespace in INTEL_DEBUG=wm output.Eric Anholt
2009-01-21i965: Use _mesa_num_inst_src_regs() instead of keeping a copy of its contents.Eric Anholt
2009-01-01i965: added OPCODE_NRM3/4Brian Paul
2008-12-03i965: Fix stray character that the compile whined about.Eric Anholt
2008-11-28i915: Remove dead early z enable bit which was always on.Eric Anholt
2008-08-24Revert "Revert "Merge branch 'drm-gem'""Dave Airlie
This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
2008-08-24Revert "Merge branch 'drm-gem'"Dave Airlie
This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03. Conflicts: src/mesa/drivers/dri/i965/brw_wm_surface_state.c
2008-08-20i965: Enable GL_ARB_fragment_program_shadow and fix key->shadowtex_mask. ↵Xiang, Haihao
(bug #16852, #16853)
2008-08-08intel-gem: Update to new check_aperture API for classic mode.Eric Anholt
To do this, I had to clean up some of 965 state upload stuff. We may end up over-emitting state in the aperture overflow case, but that should be rare, and I'd rather have the simplification of state management.
2008-04-18i965: initial attempt at fixing the aperture overflowDave Airlie
Makes state emission into a 2 phase, prepare sets things up and accounts the size of all referenced buffer objects. The emit stage then actually does the batchbuffer touching for emitting the objects. There is an assert in dri_emit_reloc if a reloc occurs for a buffer that hasn't been accounted yet.
2008-03-13 [i965] multiple rendering target supportZou Nan hai
2008-03-07 [i965] fix fd.o bug #11471 and #11478Zou Nan hai
1. Follow EXT_texture_rectangle with YCbCr texture 2. swap UV component for MESA_FORMAT_YCBCR
2008-02-28[965] Bug #9151: make fragment.position return window coords not screen coords.Eric Anholt
2008-02-14i965: remove unused hal hooksDave Airlie
These don't appear to have ever been used.
2008-01-29i965: new integrated graphics chipset supportXiang, Haihao
2007-12-21[965] Fix and enable separate stencil.Eric Anholt
Note that this does not enable GL_EXT_stencil_two_side, because Mesa's computed _TestTwoSide ends up respecting only STENCIL_TEST_TWO_SIDE_EXT (defaults to GL_FALSE), even if the application uses only GL 2.0 / ATI entrypoints.
2007-12-14[965] Replace the state cache suballocator with direct dri_bufmgr use.Eric Anholt
The user-space suballocator that was used avoided relocation computations by using the general and surface state base registers and allocating those types of buffers out of pools built on top of single buffer objects. It also avoided calls into the buffer manager for these small state allocations, since only one buffer object was being used. However, the buffer allocation cost appears to be low, and with relocation caching, computing relocations for buffers is essentially free. Additionally, implementing the suballocator required a don't-fence-subdata flag to disable waiting on buffer maps so that writing new data didn't block on rendering using old data, and careful handling when mapping to update old data (which we need to do for unavoidable relocations with FBOs). More importantly, when the suballocator filled, it had no replacement algorithm and just threw out all of the contents and forced them to be recomputed, which is a significant cost. This is the first step, which just changes the buffer type, but doesn't yet improve the hash table to not result in full recompute on overflow. Because the buffers are all allocated out of the general buffer allocator, we can no longer use the general/surface state bases to avoid relocations, and they are set to 0 instead.
2007-12-05Revert "[965] Add missing flagging of new stage programs for updating stage ↵Eric Anholt
state." I had forgotten part of brw_state_cache.c that made this fix not relevant for master (last_addr comparison and flagging based on cache id). This reverts commit a4642f3d18bdaebaba31e5dee72fe5de9d890ffb.
2007-12-05[965] Add missing flagging of new stage programs for updating stage state.Eric Anholt
Otherwise, choosing a new program wouldn't necessarily update the state, and and an old program could be executed, leading to various sorts of pretty pictures or hangs.
2007-10-26Merge branch '965-glsl'Zou Nan hai
Conflicts: src/mesa/drivers/dri/i965/brw_sf.h src/mesa/drivers/dri/i965/intel_context.c
2007-08-13i965: fix projtex_maskXiang, Haihao
projtex_mask is only an 8bit field, and wm.input_size_masks includes other attributes' information, therefore right shift is needed.
2007-06-21 support branch and loop in pixel shaderZou Nan hai
most of the sample working with some small modification
2007-04-12 Initial 965 GLSL supportZou Nan hai
2007-02-23Update DRI drivers for new glsl compiler.Brian
Mostly: - update #includes - update STATE_* token code
2006-12-09i965: Fix a crash with wine by not allocating >1MB on the stack.Eric Anholt
2006-08-09Add Intel i965G/Q DRI driver.Eric Anholt
This driver comes from Tungsten Graphics, with a few further modifications by Intel.