Age | Commit message (Collapse) | Author |
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For some reason, MOV instructions using immediate src values don't seem
to work reliably on the GLSL path. Disable them for now (falling back to
const buffer reads). This fixes a bunch of glean glsl1 failures.
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There's really no need for two negation fields. This came from the
GL_NV_fragment_program extension. The new, unified Negate bitfield applies
after the absolute value step.
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Used to map drawables, textures and constant buffers to surface binding
table indexes.
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Before, the instruction's CondUpdate field was mistakenly effecting the
constant-fetch operation.
Fixes progs/glsl/bump.c demo. But there are some other issues related
to condition flags and IF/ELSE that need investigation...
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Everything is in place now for using a true constant buffer for GLSL fragment
shaders. Still some bugs to find though.
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Currently, shader constants are stored in the GRF (loaded from the CURBE
prior to shader execution). This severly limits the number of constants
and temps that we can support.
This new code will support (practically) unlimited size constant buffers
and free up registers in the GRF. We allocate a new buffer object for the
constants and read them with "Read" messages/instructions. When only a
small number of constants are used, we can still use the old method.
The code works for fragment shaders only (and is actually disabled) for now.
Need to do the same thing for vertex shaders and need to add the necessary
code-gen to fetch the constants which are referenced by the shader
instructions.
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Fixes regression seen with progs/glsl/bump.c
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Call the get_src_reg_imm() function when it's permissible to generate a
literal value src register.
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The value was always 1.
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This also cuts instructions by just using the existing bit in the payload
rather than computing it from the determinant in the SF unit and passing it
as a varying down to the WM. Something still goes wrong with getting the
backface color right, but a simpler shader appears to get the right result.
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It seems the code that set up the FB_WRITE message was incomplete in this
case. The number of payload registers was wrong and that caused a hang.
It would be good to have a second set of eyes take a look at this...
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Before this change we would up emitting instructions with invalid register
numbers. This typically (but not always) hung the GPU. For now, just
prevent emitting bad instructions to avoid hangs. Still need to do some
kind of proper error recovery.
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Instructions such as RCP, RSQ, LOG must smear the result of the function
across the dest register's X, Y, Z and W channels (subject to write masking).
Before this change, only the X component was getting written.
Among other things, this fixes cube map texture sampling in GLSL shaders
(since cube lookups involve normalizing the texcoord).
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The i965 driver needs an extra instruction field for color output information.
It was using the Sampler field for this. Use the Aux field instead. This
will probaby be revisited at some point...
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Previously, the prog_instruction::Data field was used to map original Mesa
instructions to brw instructions in order to resolve subroutine calls. This
was a rather tangled mess. Plus it's an obstacle to implementing dynamic
allocation/growing of the instruction buffer (it's still a fixed size).
Mesa's GLSL compiler emits a label for each subroutine and CAL instruction.
Now we use those labels to patch the subroutine calls after code generation
has been done. We just keep a list of all CAL instructions that needs patching
and a list of all subroutine labels. It's a simple matter to resolve them.
This also consolidates some redundant post-emit code between brw_vs_emit.c and
brw_wm_glsl.c and removes some loops that cleared the prog_instruction::Data
fields at the end.
Plus, a bunch of new comments.
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Also, fix some RNDD vs. RNDZ confusion elsewhere.
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Added missing OPCODE_NOISE4, and use BRW_REGISTER_TYPE_D (instead of _UD)
in the initial RNDD instructions (which avoids saturating negative inputs
to 0).
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Trunc is a more accurate description; there's no type conversion involved.
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OPCODE_NOISE4 coming later.
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(Only in fragment shaders, so far. Support for NOISE3 and NOISE4 to come.)
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This is required for threads to be spawned with correctly sized GRF
register blocks.
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Makefile.template
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inst->TexSrcUnit is used as an index into program->SamplerUnits[] since
the commit ade508312c701ce89d3c2cd717994dbbabb4f207, and program->SamplerUnits
is a sampler-to-texture-unit mapping.
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