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path: root/src/mesa/drivers/dri/i965/brw_wm_glsl.c
AgeCommit message (Collapse)Author
2009-04-21i965: const correctnessBrian Paul
2009-04-16Merge branch 'register-negate'Brian Paul
2009-04-16i965: disable using immediate values for MOV instructionsBrian Paul
For some reason, MOV instructions using immediate src values don't seem to work reliably on the GLSL path. Disable them for now (falling back to const buffer reads). This fixes a bunch of glean glsl1 failures.
2009-04-16i965: minor debug output changesBrian Paul
2009-04-14mesa: merge the prog_src_register::NegateBase and NegateAbs fieldsBrian Paul
There's really no need for two negation fields. This came from the GL_NV_fragment_program extension. The new, unified Negate bitfield applies after the absolute value step.
2009-04-09i965: new SURF_INDEX_ macrosBrian Paul
Used to map drawables, textures and constant buffers to surface binding table indexes.
2009-04-08i965: clean-ups, debug code in brw_wm_glsl.cBrian Paul
2009-04-08i965: init current_const[i].index = -1Brian Paul
2009-04-08i965: move the fetch_constants() call before setting conditional mod stateBrian Paul
Before, the instruction's CondUpdate field was mistakenly effecting the constant-fetch operation. Fixes progs/glsl/bump.c demo. But there are some other issues related to condition flags and IF/ELSE that need investigation...
2009-04-03i965: more const buffer debug codeBrian Paul
2009-04-03i965: another checkpoint commit of new constant buffer supportBrian Paul
Everything is in place now for using a true constant buffer for GLSL fragment shaders. Still some bugs to find though.
2009-04-03i965: change args to get_src_reg() to prep for new constant buffer supportBrian Paul
2009-04-03i965: check-point commit of new constant buffer supportBrian Paul
Currently, shader constants are stored in the GRF (loaded from the CURBE prior to shader execution). This severly limits the number of constants and temps that we can support. This new code will support (practically) unlimited size constant buffers and free up registers in the GRF. We allocate a new buffer object for the constants and read them with "Read" messages/instructions. When only a small number of constants are used, we can still use the old method. The code works for fragment shaders only (and is actually disabled) for now. Need to do the same thing for vertex shaders and need to add the necessary code-gen to fetch the constants which are referenced by the shader instructions.
2009-04-03i965: do negation and Abs in get_src_reg_imm()Brian Paul
Fixes regression seen with progs/glsl/bump.c
2009-04-03i965: comments for sampling codeBrian Paul
2009-04-03i965: add support for float literal instruction operandsBrian Paul
Call the get_src_reg_imm() function when it's permissible to generate a literal value src register.
2009-04-03i965: remove 'nr' param from get_src/dst_reg() functionsBrian Paul
The value was always 1.
2009-04-03i965: fix comment typoBrian Paul
2009-03-23i965: Fix glFrontFacing in twoside GLSL demo.Eric Anholt
This also cuts instructions by just using the existing bit in the payload rather than computing it from the determinant in the SF unit and passing it as a varying down to the WM. Something still goes wrong with getting the backface color right, but a simpler shader appears to get the right result.
2009-03-13i965: move declarations before codeBrian Paul
2009-03-11i965: fix lock-ups when GLSL program wrote to gl_FragDepthBrian Paul
It seems the code that set up the FB_WRITE message was incomplete in this case. The number of payload registers was wrong and that caused a hang. It would be good to have a second set of eyes take a look at this...
2009-03-10i965: more code clean-ups, commentsBrian Paul
2009-03-10i965: minor code clean-ups, commentsBrian Paul
2009-03-06i965: check if we run out of GRF/temp registersBrian Paul
Before this change we would up emitting instructions with invalid register numbers. This typically (but not always) hung the GPU. For now, just prevent emitting bad instructions to avoid hangs. Still need to do some kind of proper error recovery.
2009-03-06i965: comments and minor clean-upsBrian Paul
2009-03-05i965: comments and formatting fixesBrian Paul
2009-03-05i965: fix emit_math1() function used for scalar instructionsBrian Paul
Instructions such as RCP, RSQ, LOG must smear the result of the function across the dest register's X, Y, Z and W channels (subject to write masking). Before this change, only the X component was getting written. Among other things, this fixes cube map texture sampling in GLSL shaders (since cube lookups involve normalizing the texcoord).
2009-02-26mesa: replace old prog_instruction::Sampler field with Aux fieldBrian Paul
The i965 driver needs an extra instruction field for color output information. It was using the Sampler field for this. Use the Aux field instead. This will probaby be revisited at some point...
2009-02-20i965: additional debug outputBrian Paul
2009-02-13i965: rewrite the code for handling shader subroutine callsBrian Paul
Previously, the prog_instruction::Data field was used to map original Mesa instructions to brw instructions in order to resolve subroutine calls. This was a rather tangled mess. Plus it's an obstacle to implementing dynamic allocation/growing of the instruction buffer (it's still a fixed size). Mesa's GLSL compiler emits a label for each subroutine and CAL instruction. Now we use those labels to patch the subroutine calls after code generation has been done. We just keep a list of all CAL instructions that needs patching and a list of all subroutine labels. It's a simple matter to resolve them. This also consolidates some redundant post-emit code between brw_vs_emit.c and brw_wm_glsl.c and removes some loops that cleared the prog_instruction::Data fields at the end. Plus, a bunch of new comments.
2009-02-13i965: updated commentsBrian Paul
2009-02-13i965: more reformatting/clean-upBrian Paul
2009-02-13i965: s/__inline/INLINE/Brian Paul
2009-02-13i965: formatting and indentation fixesBrian Paul
2009-01-14i965: comment for emit_kil()Brian Paul
2009-01-14i965: fix indentationBrian Paul
2009-01-07i965: Fix GLSL FS DPH to return the right value instead of src0.w * src1.w.Eric Anholt
2009-01-05i965: implement OPCODE_TRUNC (round toward zero) on vertex path.Brian Paul
Also, fix some RNDD vs. RNDZ confusion elsewhere.
2008-12-13i965: Finish OPCODE_NOISEn instructions.Gary Wong
Added missing OPCODE_NOISE4, and use BRW_REGISTER_TYPE_D (instead of _UD) in the initial RNDD instructions (which avoids saturating negative inputs to 0).
2008-11-06mesa: rename OPCODE_INT -> OPCODE_TRUNCBrian Paul
Trunc is a more accurate description; there's no type conversion involved.
2008-11-05i965: Implement missing OPCODE_NOISE3 instruction in fragment shaders.Gary Wong
OPCODE_NOISE4 coming later.
2008-10-31i965: implement the missing OPCODE_NOISE1 and OPCODE_NOISE2 instructions.Gary Wong
(Only in fragment shaders, so far. Support for NOISE3 and NOISE4 to come.)
2008-10-28i965: Allocate temporaries contiguously with other regs in fragment shaders.Gary Wong
This is required for threads to be spawned with correctly sized GRF register blocks.
2008-09-18mesa: added "main/" prefix to includes, remove some -I paths from ↵Brian Paul
Makefile.template
2008-08-29i965: Push/pop instruction state. partial fix for #16882Xiang, Haihao
2008-08-05i965: Use program->SamplerUnits[] to get the appropriate texture unit.Xiang, Haihao
inst->TexSrcUnit is used as an index into program->SamplerUnits[] since the commit ade508312c701ce89d3c2cd717994dbbabb4f207, and program->SamplerUnits is a sampler-to-texture-unit mapping.
2008-06-10i965: apply commit 6c1a98e97affb2163e776551eb3a9e669ff99bbf to glslXiang, Haihao
2008-03-17 [i965] fix wpos height 1 pixel higherZou Nan hai
2008-03-13 [i965] multiple rendering target supportZou Nan hai
2008-02-28[965] Bug #9151: make fragment.position return window coords not screen coords.Eric Anholt