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path: root/src/mesa/drivers/dri/i965/brw_wm_pass1.c
AgeCommit message (Collapse)Author
2009-09-11i965: Move OPCODE_DDX/DDY to brw_wm_emit.c and make it actually work.Eric Anholt
Previously, it was trying to mess around with the varying's WM setup data to produce a result. Along with not actually working when passed a varying, this wouldn't work if you did dFd[xy]() on a temporary. Instead, just calculate the derivative using the neighbors in the subspan.
2009-09-04i965: Add support for KIL_NV in brw_wm_emit.cEric Anholt
I ran into this lack of support when writing a shader that always discarded the fragments.
2009-06-02i965: Support OPCODE_TRUNC in the brw_wm_fp.c code.Eric Anholt
This gets two more glean glsl1 tests using the non-GLSL path.
2009-03-23i965: Fix glFrontFacing in twoside GLSL demo.Eric Anholt
This also cuts instructions by just using the existing bit in the payload rather than computing it from the determinant in the SF unit and passing it as a varying down to the WM. Something still goes wrong with getting the backface color right, but a simpler shader appears to get the right result.
2009-02-20i965: use the new prog_instruction::TexShadow fieldBrian Paul
GLSL shadow() sampler calls are properly propogated down to the driver now. The glean glsl1 shadow() tests work (except for the alpha channel).
2009-01-22i965: whitespace changes and reformattingBrian Paul
2008-03-26[965] Correctly set read mask for OPCODE_SWZ in pass1.Michal Wajdeczko
While OPCODE_SWZ has usually been optimized away in pass0, it may still exist if a SWZ with dst saturate was emitted in pass_fp. Fixes an error in oglconform fpalu.c.
2007-04-12 Initial 965 GLSL supportZou Nan hai
2007-02-23Update DRI drivers for new glsl compiler.Brian
Mostly: - update #includes - update STATE_* token code
2006-08-09Add Intel i965G/Q DRI driver.Eric Anholt
This driver comes from Tungsten Graphics, with a few further modifications by Intel.