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path: root/src/mesa/drivers/dri/i965/brw_wm_pass2.c
AgeCommit message (Collapse)Author
2009-05-14i965: Fix varying payload reg assignment for the non-GLSL-instructions path.Eric Anholt
I don't have a testcase for this, but it seems clearly wrong.
2009-05-14i965: Fix register allocation of GLSL fp inputs.Eric Anholt
Before, if the VP output something that is in the attributes coming into the WM but which isn't used by the WM, then WM would end up reading subsequent varyings from the wrong places. This was visible with a GLSL demo using gl_PointSize in the VS and a varying in the WM, as point size is in the VUE but not used by the WM. There is now a regression test in piglit, glsl-unused-varying.
2009-01-22i965: whitespace changes and reformattingBrian Paul
2008-02-19 fix compile for previous commitZou Nan hai
2008-02-19[i965] fix broken glsl texdemo1Zou Nan hai
2008-02-14i965: use setup attributes as inputs when allocating registersXiang, Haihao
for WM payload. fix #10767
2007-06-21 support branch and loop in pixel shaderZou Nan hai
most of the sample working with some small modification
2007-02-23Update DRI drivers for new glsl compiler.Brian
Mostly: - update #includes - update STATE_* token code
2006-08-09Add Intel i965G/Q DRI driver.Eric Anholt
This driver comes from Tungsten Graphics, with a few further modifications by Intel.