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path: root/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
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2010-06-23Merge branch 'shader-file-reorg'Brian Paul
1. Move all GL entrypoint functions and files into src/mesa/main/ This includes the ARB vp/vp, NV vp/fp, ATI fragshader and GLSL bits that were in src/mesa/shader/ 2. Move src/mesa/shader/slang/ to src/mesa/slang/ to reduce the tree depth 3. Rename src/mesa/shader/ to src/mesa/program/ since all the remaining files are concerned with GPU programs. 4. Misc code refactoring. In particular, I got rid of most of the GLSL-related ctx->Driver hook functions. None of the drivers used them. Conflicts: src/mesa/drivers/dri/i965/brw_context.c
2010-06-11i965: Remove the surface key used to generate constant surfaces.Eric Anholt
We had to fill out all that junk when using the cache, but no more.
2010-06-11i965: Warning fixes from the i965-streaming merge.Eric Anholt
2010-06-11i965: Use the state base address to avoid relocations.Eric Anholt
This makes the binding table code simpler, and is required for gen6, which requires binding table addresses to be under 64k offset from the surface state base addr. No significant change in performance on firefox-talos-gfx.
2010-06-11i965: Remove caching of surface state objects.Eric Anholt
It turns out that computing a 56 byte key to look up a 20-byte object out of a hash table was some sort of a bad idea. Whoops. before: [ # ] backend test min(s) median(s) stddev. count [ 0] gl firefox-talos-gfx 37.799 38.203 0.39% 6/6 after: [ 0] gl firefox-talos-gfx 34.761 34.784 0.17% 5/6
2010-06-11i965: Convert the binding table to streamed indirect state.Eric Anholt
This slightly reduces reduces cairo-gl firefox-talos-gfx runtime on my Ironlake: before: [ # ] backend test min(s) median(s) stddev. count [ 0] gl firefox-talos-gfx 38.236 38.383 0.43% 5/6 after: [ 0] gl firefox-talos-gfx 37.799 38.203 0.39% 6/6 It turns out the cost of caching these objects and looking them up in the cache again is greater than the cost of just computing the object again, particularly when the overhead of having a separate BO to pin is removed. (Those that are paying close attention will note that this is a reversal of the path I was moving the driver in a couple of years ago. The major thing that has changed is that back then all state was recomputed when we wrapped the streaming state buffer, including recompiling our precious programs. Now, we're uncaching just the objects that are cheap to compute, and retaining caching of expensive objects)
2010-06-11i965: Split constant buffer setup from its surface state/binding state.Eric Anholt
This was bothering me when redoing the binding tables.
2010-06-10mesa: rename src/mesa/shader/ to src/mesa/program/Brian Paul
2010-06-10i965: Add support for GL_ALPHA framebuffer objects.Eric Anholt
2010-06-08intel: Convert remaining dri_bo_emit_reloc to drm_intel_bo_emit_reloc.Eric Anholt
The new API makes so much more sense, I'd like to forget how the old one worked.
2010-06-08intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.Eric Anholt
The slightly less mechanical change of converting the emit_reloc calls will follow.
2010-06-02intel: Remove a leftover DRI1/DRI2 conditionalKristian Høgsberg
2010-04-22i965: Fix assertion for surface tile offset usage on Ironlake.Eric Anholt
Fixes assertion failure in fbo-generatemipmap-npot.
2010-03-17intel: Replace mt->pitch with mt->region->pitch.Eric Anholt
The pitch is not really an inherent part of the miptree, since it's not part of any of the layout calculations, and it's dictated by the libdrm-allocated region pitch now.
2010-03-05intel: Remove support for the DRI1 TFP extension.Eric Anholt
2010-03-05i965: Remove the paths for making a const surface object for a NULL BO.Eric Anholt
2010-02-25i965: Update WM surface state setup for sandybridge's new BLEND_STATE.Eric Anholt
2010-01-26i965: Add support for EXT_draw_buffers2.Eric Anholt
2010-01-19i965: Allow for variable-sized auxdata in the state cache.Eric Anholt
Everything has been constant-sized until now, but constant buffer handling changes will make us want some additional variable sized array.
2010-01-05i965: Fix build after blind merge of mesa 7.7 by Brian.Eric Anholt
2010-01-04Merge branch 'mesa_7_7_branch'Brian Paul
Conflicts: docs/relnotes.html src/gallium/drivers/llvmpipe/lp_tex_sample_c.c src/gallium/drivers/r300/r300_cs.h src/mesa/drivers/dri/i965/brw_wm_surface_state.c src/mesa/main/enums.c
2010-01-04i965: Fix the surface offset calculation for tiled buffers.Eric Anholt
If we ever had a non-tile-aligned tiled renderbuffer, the math was all off. Use the existing x,y coordinates instead of trying to reconstruct them from an incorrectly-calculated offset value.
2009-12-29mesa: implement per-buffer color maskingBrian Paul
This is part of the GL_EXT_draw_buffers2 extension and part of GL 3.0. The ctx->Color.ColorMask field is now a 2-D array. Until drivers are modified to support per-buffer color masking, they can just look at the 0th color mask. The new _mesa_ColorMaskIndexed() function will be called by glColorMaskIndexedEXT() or glColorMaski().
2009-12-22intel: Replace IS_G4X() across the driver with context structure usage.Eric Anholt
Saves ~2KB of code.
2009-12-14i965: Use current draw buffer instead of drawable visual to get alpha bitsIan Romanick
Use the currently bound draw buffer instead of the visual from the drawable used to create the context. This cause problems generating mipmaps for an RGBA texture in an RGB context. This fixes the failure in piglit's glsl-lod-bias test reported in bug #25614.
2009-12-10intel: Remove ARGB internal_format == GL_RGB hacksIan Romanick
Now that XRGB is supported, we don't need to hack around cases of an RGBA format buffer with an internal format of GL_RGB.
2009-12-10i965: Fix handling of drawing to MESA_FORMAT_XRGB8888Ian Romanick
It turns out that 965 and friends cannot actually render to an xRGB surfaces. Instead, the surface has to be RGBA with writes to alpha disabled and the blend function modified to always use 1.0 for destination alpha.
2009-12-10intel: Axe intel_renderbuffer::texformatIan Romanick
Since the texformat branch merge, the value of intel_renderbuffer::texformat is just a copy of gl_renderbuffer::Format.
2009-11-16i965: Use MESA_FORMAT_AL1616 when appropriateIan Romanick
2009-11-10i965: Add a note explaining the data cache domain.Eric Anholt
2009-10-29intel: update intel_create_renderbuffer(format), add XRGB supportBrian Paul
Pass a gl_format to intel_create_renderbuffer() instead of GLenum. Add cases for MESA_FORMAT_XRGB8888 textures and renderbuffers. However, we don't yet create any renderbuffers or textures with that format. It seems the default alpha value is zero instead of one. Need to investigate that first.
2009-10-29i965: define, use BRW_MAX_DRAW_BUFFERSBrian Paul
i965 might support more than 4 color draw buffers. But if not, this protects from breakage if the Mesa limit is raised.
2009-10-28Merge branch 'texformat-rework'Brian Paul
Conflicts: src/mesa/drivers/dri/radeon/radeon_fbo.c src/mesa/drivers/dri/s3v/s3v_tex.c src/mesa/drivers/dri/s3v/s3v_xmesa.c src/mesa/drivers/dri/trident/trident_context.c src/mesa/main/debug.c src/mesa/main/mipmap.c src/mesa/main/texformat.c src/mesa/main/texgetimage.c
2009-10-23i965: Annotate _NEW_COLOR dependency for brw_update_renderbuffer_surface().Eric Anholt
2009-10-21i965: change parameter type to gl_formatBrian Paul
2009-10-12i965: remove unused varBrian Paul
2009-10-05drivers: don't include texformat.hBrian Paul
And remove other unneeded #includes while we're at it.
2009-10-02i965: Use a little stack space to avoid a malloc in wm_get_binding_table.Eric Anholt
2009-09-30mesa: replace gl_texture_format with gl_formatBrian Paul
Now gl_texture_image::TexFormat is a simple MESA_FORMAT_x enum. ctx->Driver.ChooseTexture format also returns a MESA_FORMAT_x. gl_texture_format will go away next.
2009-09-28intel: Remove some dead metaops code.Eric Anholt
2009-09-09i965: Fix relocation delta for WM surfaces.Eric Anholt
This was a regression in 0f328c90dbc893e15005f2ab441d309c1c176245. Bug #23688 Bug #23254
2009-09-08i965: Set NULL WM surfaces as tiled according to requirement by specs.Eric Anholt
2009-09-08i965: Use the renderbuffer surface size instead of region size for WM surfaces.Eric Anholt
For drawing to lower mipmap levels, the region size makes the renderbuffer be the size of the lowest level, instead of the current level. On DRI1, Brian previously found that the RB size was incorrect, so leave this broken there.
2009-06-17i965: Fall back or appropriately adjust offsets of drawing to tiled regions.Eric Anholt
3D rendering to tiled textures was being done with non-tile-aligned offsets. The G4X hardware has fields to let us support it easily and correctly, while the pre-G4X hardware requires a path full of suffering, so we just fall back.
2009-05-06i965: Remove the forced lack of caching for renderbuffer surface state.Eric Anholt
This snuck in with the multi-draw-buffers commit, and is a major penalty to performance. It doesn't appear to be required, as the only dependency the surface BO has is on the state key (and if there's some other dependency, it should just be in the key). This brings openarena performance up to almost 2% faster than Mesa 7.4.
2009-05-06i965: Remove _NEW_PROGRAM from brw_wm_surfaces setup dependencies.Eric Anholt
This was a leftover from the brw_wm_constant_buffer change.
2009-05-06i965: Split WM constant buffer update from other WM surfaces.Eric Anholt
This can avoid re-uploading constant data when it isn't necessary, and is a step towards not updating other surfaces just because constants change. It also brings the upload of the constant buffer next to the creation. This brings openarena performance up another 4%, to 91% of the Mesa 7.4 branch.
2009-05-06i965: Disentangle VS constant surface state from WM surface state.Eric Anholt
Also, only create VS surface state if there's a VS constant buffer to be uploaded, and set the contents of the buffer at the same time as creation.
2009-05-06i965: Don't create constant buffers if they won't be used.Eric Anholt
Really, the creation and upload of constants should be in the same place, since they should only happen together, and a state flag should be triggered by them so that we don't thrash state around so much for just updating constants. But this still recovers openarena performance by another 19%, leaving us 16% behind Mesa 7.4 branch.
2009-05-01Merge branch 'const-buffer-changes'Brian Paul
Conflicts: src/mesa/drivers/dri/i965/brw_curbe.c src/mesa/drivers/dri/i965/brw_vs_emit.c src/mesa/drivers/dri/i965/brw_wm_glsl.c