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path: root/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
AgeCommit message (Expand)Author
2008-04-22i965: fix DEPTH_TEXTURE_MODE (bug #14220)Xiang, Haihao
2008-04-18i965: initial attempt at fixing the aperture overflowDave Airlie
2008-03-19[965] Initialize region surface key structure padding.Eric Anholt
2008-03-14intel: fix abort issue with shadowtex demo when useXiang, Haihao
2008-03-13 [i965] multiple rendering target supportZou Nan hai
2008-02-28[965] Fix conditional sequencing to allow the frame_buffer_texobj case.Eric Anholt
2008-01-10[intel] Add more cliprect modes to cover other meanings for batch emits.Eric Anholt
2008-01-03[intel] Convert relocations to not be cleared out on buffer submit.Eric Anholt
2008-01-02[965] Convert surface state to use a cache key instead of brw_cache_data.Eric Anholt
2007-12-17[965] Allow draw or depth regions to be NULL.Eric Anholt
2007-12-17i965: check NULL pointerXiang, Haihao
2007-12-16[965] Fully initialize the texture surface key data (padding around GLboolean)Eric Anholt
2007-12-16[965] Move to using shared texture management code.Eric Anholt
2007-12-14[965] Replace the state cache suballocator with direct dri_bufmgr use.Eric Anholt
2007-12-07[965] Convert the driver to dri_bufmgr interface and enable TTM.Eric Anholt
2007-12-07[965] Remove dead code in upload_wm_surfaces.Eric Anholt
2007-12-07[965] Move brw_surface_state stack allocation into the function using it.Eric Anholt
2007-08-10i965: roland's DXTn format texture patch(bug10347)Xiang, Haihao
2007-08-02 EXT_texture_sRGB support on i965Zou Nan hai
2007-07-31i965: Use I16_UNORM instead of L16_UNORM (bug 11742)Xiang, Haihao
2006-11-29Add accelerated CopyPixels for non-overlapping, 1:1 blits.Eric Anholt
2006-09-21use the requested internal texture format where possibleKeith Whitwell
2006-09-07Make sure bmBufferOffset is called for all active buffers every timeKeith Whitwell
2006-08-09Add Intel i965G/Q DRI driver.Eric Anholt