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path: root/src/mesa/drivers/dri/i965
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2009-06-04intel: Add support for tiled textures.Eric Anholt
This is about a 30% performance win in OA with high settings on my GM45, and experiments with 915GM indicate that it'll be around a 20% win there. Currently, 915-class hardware is seriously hurt by the fact that we use fence regs to control the tiling even for 3D instructions that could live without them, so we spend a bunch of time waiting on previous rendering in order to pull fences off. Thus, the texture_tiling driconf option defaults off there for now.
2009-06-02i965: Support OPCODE_TRUNC in the brw_wm_fp.c code.Eric Anholt
This gets two more glean glsl1 tests using the non-GLSL path.
2009-05-21i965: fix whitespace in brw_tex_layout.cEric Anholt
The broken indentation was driving me crazy, so fix other stuff while I'm here.
2009-05-21i956: Make state dependency of SF on drawbuffer bounds match Mesa's.Eric Anholt
Noticed while debugging a weird 1D FBO testcase that left its existing viewport and projection matrix in place when switching drawbuffers. Didn't fix the testcase, though.
2009-05-21i965: rename var: s/tmp/vs_inputs/Brian Paul
2009-05-14i965: Fix varying payload reg assignment for the non-GLSL-instructions path.Eric Anholt
I don't have a testcase for this, but it seems clearly wrong.
2009-05-14i965: Fix register allocation of GLSL fp inputs.Eric Anholt
Before, if the VP output something that is in the attributes coming into the WM but which isn't used by the WM, then WM would end up reading subsequent varyings from the wrong places. This was visible with a GLSL demo using gl_PointSize in the VS and a varying in the WM, as point size is in the VUE but not used by the WM. There is now a regression test in piglit, glsl-unused-varying.
2009-05-14i965: fix 1D texture borders with GL_CLAMP_TO_BORDERRobert Ellison
With 1D textures, GL_TEXTURE_WRAP_T should be ignored (only GL_TEXTURE_WRAP_S should be respected). But the i965 hardware seems to follow the value of GL_TEXTURE_WRAP_T even when sampling 1D textures. This fix forces GL_TEXTURE_WRAP_T to be GL_REPEAT whenever 1D textures are used; this allows the texture to be sampled correctly, avoiding "imaginary" border elements in the T direction. This bug was demonstrated in the Piglit tex1d-2dborder test. With this fix, that test passes.
2009-05-12i965: enable additional code in emit_fb_write()Brian Paul
Not 100% sure this is right, but the invalid assertion is fixed...
2009-05-12i965: increase BRW_EU_MAX_INSNBrian Paul
2009-05-12i965: commentBrian Paul
2009-05-11i965: handle extended swizzle terms (0,1) in get_src_reg()Brian Paul
Fixes failed assertion in progs/glsl/twoside.c (but still wrong rendering).
2009-05-08i965: improve debug loggingRobert Ellison
Looking for memory leaks that were causing crashes in my environment in a situation where valgrind would not work, I ended up improving the i965 debug traces so I could better see where the memory was being allocated and where it was going, in the regions and miptrees code, and in the state caches. These traces were specific enough that external scripts could determine what elements were not being released, and where the memory leaks were. I also ended up creating my own backtrace code in intel_regions.c, to determine exactly where regions were being allocated and for what, since valgrind wasn't working. Because it was useful, I left it in, but disabled and compiled out. It can be activated by changing a flag at the top of the file.
2009-05-08i965: fix segfault on low memory conditionsRobert Ellison
When out of memory (in at least one case, triggered by a longrunning memory leak), this code will segfault and crash. By checking for the out-of-memory condition, the system can continue, and will report the out-of-memory error later, a much preferable outcome.
2009-05-08intel: Add a metaops version of glGenerateMipmapEXT/SGIS_generate_mipmaps.Eric Anholt
In addition to being HW accelerated, it avoids the incorrect (black) rendering of the mipmaps that SW was doing in fbo-generatemipmap. Improves the performance of the mipmap generation and drawing in fbo-generatemipmap by 30%.
2009-05-08i965: const qualifiersBrian Paul
2009-05-08i965: don't use GRF regs 126,127 for WM programsBrian Paul
They seem to be used for something else and using them for shader temps seems to lead to GPU lock-ups. Call _mesa_warning() when we run out of temps. Also, clean up some debug code.
2009-05-07i965: relAddr local var (to make debug/test a little easier)Brian Paul
2009-05-06i965: Remove bad constant buffer constant-reg-already-loaded optimization.Eric Anholt
Thanks to branching, the state of c->current_const[i].index at the point of emitting constant loads for this instruction may not match the actual constant currently loaded in the reg at runtime. Fixes a regression in my GLSL program for idr's class since b58b3a786aa38dcc9d72144c2cc691151e46e3d5.
2009-05-06i965: Remove the forced lack of caching for renderbuffer surface state.Eric Anholt
This snuck in with the multi-draw-buffers commit, and is a major penalty to performance. It doesn't appear to be required, as the only dependency the surface BO has is on the state key (and if there's some other dependency, it should just be in the key). This brings openarena performance up to almost 2% faster than Mesa 7.4.
2009-05-06i965: Remove _NEW_PROGRAM from brw_wm_surfaces setup dependencies.Eric Anholt
This was a leftover from the brw_wm_constant_buffer change.
2009-05-06i965: Split WM constant buffer update from other WM surfaces.Eric Anholt
This can avoid re-uploading constant data when it isn't necessary, and is a step towards not updating other surfaces just because constants change. It also brings the upload of the constant buffer next to the creation. This brings openarena performance up another 4%, to 91% of the Mesa 7.4 branch.
2009-05-06i965: Disentangle VS constant surface state from WM surface state.Eric Anholt
Also, only create VS surface state if there's a VS constant buffer to be uploaded, and set the contents of the buffer at the same time as creation.
2009-05-06i965: Don't create constant buffers if they won't be used.Eric Anholt
Really, the creation and upload of constants should be in the same place, since they should only happen together, and a state flag should be triggered by them so that we don't thrash state around so much for just updating constants. But this still recovers openarena performance by another 19%, leaving us 16% behind Mesa 7.4 branch.
2009-05-01Merge branch 'const-buffer-changes'Brian Paul
Conflicts: src/mesa/drivers/dri/i965/brw_curbe.c src/mesa/drivers/dri/i965/brw_vs_emit.c src/mesa/drivers/dri/i965/brw_wm_glsl.c
2009-04-27i965: #include prog_print.h to silence warningBrian Paul
2009-04-27i965: only upload constant buffer data when we actually need the const bufferBrian Paul
Make the use_const_buffer field per-program and only call the code which updates the constant buffer's data if the flag is set. This should undo the perf regression from 20f3497e4b6756e330f7b3f54e8acaa1d6c92052 (cherry picked from master, commit dc9705d12d162ba6d087eb762e315de9f97bc456)
2009-04-27i965: only upload constant buffer data when we actually need the const bufferBrian Paul
Make the use_const_buffer field per-program and only call the code which updates the constant buffer's data if the flag is set. This should undo the perf regression from 20f3497e4b6756e330f7b3f54e8acaa1d6c92052
2009-04-24i965: rework GLSL/WM register allocationBrian Paul
Use a bitvector of used/free flags. If we run out of temps, examine the live intervals of the temp regs in the program and free those which are no longer alive. Also, enable the new WM const buffer code.
2009-04-24i965: use drm_intel_gem_bo_map/unmap_gtt() when possible, otherwise ↵Brian Paul
dri_bo_subdata() This wraps up the unfinished business from commit a9a363f8298e9d534e60e3d2869f8677138a1e7e
2009-04-24i965: fix point size issueRoland Scheidegger
need to clamp point size to user set min/max values, even for constant point size. Fixes glean pointAtten test.
2009-04-23i965: revert part of commit 4f4907d69f9020ce17aef21b6431d2dd65e01982Brian Paul
The drm_intel_gem_bo_map_gtt() call that replaced dri_bo_map() is producing errors like: intel_bufmgr_gem.c:689: Error preparing buffer map 39 (vp_const_buffer): Invalid argument . and returning NULL, causing a segfault in the memcpy(). Just reverting until we can get to the root issue...
2009-04-23i965: Support drawing to FBO cube faces other than positive X.Eric Anholt
Also fixes drawing to 3D texture depth levels.
2009-04-23intel: Take advantage of GL_READ_ONLY_ARB to map to GEM bo_map write flag.Eric Anholt
This is a CPU win in general, but in particular reduces the pain of Mesa's calculation of min/max indices in DrawElements (wtf?).
2009-04-22i965: disable debug printfBrian Paul
2009-04-22i965: enable VS constant buffersBrian Paul
In the VS constants can now be handled in two different ways: 1. If there's room in the GRF, put constants there. They're preloaded from the CURBE prior to VS execution. This is the historical approach. The problem is the GRF may not have room for all the shader's constants and temps and misc registers. Hence... 2. Use a separate constant buffer which is read from using a READ message. This allows a very large number of constants and frees up GRF regs for shader temporaries. This is the new approach. May be a little slower than 1. 1 vs. 2 is chosen according to how many constants and temps the shader needs.
2009-04-22i965: define BRW_MAX_GRFBrian Paul
2009-04-22i965: remove old code to init surface-related cache IDsBrian Paul
These types are only found in the new surface state cache now.
2009-04-22i965: comments, reformattingBrian Paul
2009-04-22i965: actually use the new, second surface state cacheBrian Paul
2009-04-22i965: checkpoint commit: use two state caches instead of oneBrian Paul
The new, second cache will only be used for surface-related items. Since we can create many surfaces the original, single cache could get filled quickly. When we cleared it, we had to regenerate shaders, etc. With two caches, we can avoid doing that.
2009-04-22i965: remove unused state atom entriesBrian Paul
2009-04-22intel: fix max anisotropy supportedRoland Scheidegger
i915 actually supports up to 4 (according to header file - not tested), i965 up to 16 (code already handled this but slightly broken), so don't use 2 for all chips, even though angular dependency is very high.
2009-04-22i965: the brw_constant_buffer state atom is no longer dynamicBrian Paul
No more dynamic atoms so we can simplify the state validation code a little.
2009-04-22i965: add _NEW_PROGRAM_CONSTANTS to mesa_bits[] listBrian Paul
2009-04-22i965: use _NEW_PROGRAM_CONSTANTS and always create new const buffersBrian Paul
When program constants change we create a new VS constant buffer instead of re-using the old one. This allows us to have several const buffers in flight with vertex rendering.
2009-04-22i965: updates to some debug codeBrian Paul
2009-04-22i965: use new _NEW_PROGRAM_CONSTANTS flag instead of dynamic flagsBrian Paul
2009-04-21i965: const correctnessBrian Paul
2009-04-18i965: use region width, height in brw_update_renderbuffer_surface()Brian Paul
Fixes a regression from commit 2c30fd84dfa052949a117c78d932b58c1f88b446 seen with DRI1.