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path: root/src/mesa/drivers/dri/i965
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2008-01-02[965] Convert surface state to use a cache key instead of brw_cache_data.Eric Anholt
2008-01-02[965] Convert sampler state to use a cache key instead of brw_cache_data.Eric Anholt
2008-01-02[965] Improve performance by including reloc target buffer pointers in keys.Eric Anholt
Without this, the WM binding tables would all collide, for example. Improves openarena performance by around 2%.
2007-12-29fix fd.o bug #13847Zou Nan hai
2007-12-21[965] Fix and enable separate stencil.Eric Anholt
Note that this does not enable GL_EXT_stencil_two_side, because Mesa's computed _TestTwoSide ends up respecting only STENCIL_TEST_TWO_SIDE_EXT (defaults to GL_FALSE), even if the application uses only GL 2.0 / ATI entrypoints.
2007-12-21[intel] Move some pixel path support from drivers to shared.Eric Anholt
2007-12-21intel: cast a pointer to unsigned long, avoid potential error.Xiang, Haihao
2007-12-20[965] Enable EXT_framebuffer_object.Eric Anholt
To do so, merge the remainnig necessary code from the buffers, blit, span, and screen code to shared, and replace it with those.
2007-12-20[965] Actually enable SGIS_generate_mipmap.Eric Anholt
2007-12-19i965: allocate GRF registers before building subroutines,Xiang, Haihao
it ensures there are sufficient registers for all subroutines.
2007-12-19i965: restore the flag after building the subroutine of theXiang, Haihao
GS thread. fix #13240
2007-12-18[INTEL] Fix 965 to use new centralized mipmap pitch functionKeith Packard
2007-12-17[965] Allow draw or depth regions to be NULL.Eric Anholt
With FBOs, we end up wanting to do 3D metaops against one or the other without having to find the other one to fill in if we're not going to draw to it.
2007-12-17[965] Simplify scissor handling by using DrawBuffer values.Eric Anholt
2007-12-17[965] fix bad conflict resolution in debug code.Eric Anholt
2007-12-17[965] Replace our own depth constants in intel context with GL context ones.Eric Anholt
2007-12-17[965] Fix software fallbacks with region-backed textures.Eric Anholt
2007-12-17[intel] Cleanup of */intel_blit.c to bring the two closer.Eric Anholt
2007-12-17[965] Output the buffer type in INTEL_DEBUG=bat surface state decode.Eric Anholt
2007-12-17i965: check NULL pointerXiang, Haihao
2007-12-16[965] Fully initialize the texture surface key data (padding around GLboolean)Eric Anholt
2007-12-16[965] Enable ARB_pixel_buffer_object, and disable broken imaging extension.Eric Anholt
While I haven't tested the imaging extension, this matches what 915 does.
2007-12-16[965] Move to using shared texture management code.Eric Anholt
This removes the delayed texture upload optimization from 965, in exchange for bringing us closer to PBO support. It also disables SGIS_generate_mipmap, which didn't seem to be working before anyway, according to the lodbias demo.
2007-12-15[intel] Whitespace and comment changes to bring intel_mipmap_tree.c closer.Eric Anholt
2007-12-15[intel] Merge intel_buffer_objects to shared.Eric Anholt
965 gains fixed TTM typing of the buffer object buffers and unused PBO functions, and 915 gains buffer size == 0 fixes from 965.
2007-12-15[965] Use shared intel_regions.c.Eric Anholt
This adds (so far) unused PBO functions, and holding the lock while writing to regions (which may be shared static screen regions).
2007-12-14[intel] warnings cleanupEric Anholt
2007-12-14[965] Replace the state cache suballocator with direct dri_bufmgr use.Eric Anholt
The user-space suballocator that was used avoided relocation computations by using the general and surface state base registers and allocating those types of buffers out of pools built on top of single buffer objects. It also avoided calls into the buffer manager for these small state allocations, since only one buffer object was being used. However, the buffer allocation cost appears to be low, and with relocation caching, computing relocations for buffers is essentially free. Additionally, implementing the suballocator required a don't-fence-subdata flag to disable waiting on buffer maps so that writing new data didn't block on rendering using old data, and careful handling when mapping to update old data (which we need to do for unavoidable relocations with FBOs). More importantly, when the suballocator filled, it had no replacement algorithm and just threw out all of the contents and forced them to be recomputed, which is a significant cost. This is the first step, which just changes the buffer type, but doesn't yet improve the hash table to not result in full recompute on overflow. Because the buffers are all allocated out of the general buffer allocator, we can no longer use the general/surface state bases to avoid relocations, and they are set to 0 instead.
2007-12-13[intel] Enable INTEL_DEBUG=bufmgr output in TTM mode as well as classic.Eric Anholt
2007-12-12[intel] Move bufmgr back to context instead of screen, fixing glthreads.Eric Anholt
Putting the bufmgr in the screen is not thread-safe since the emit_reloc changes. It also led to a significant performance hit from pthread usage for the attempted thread-safety (up to 12% of a cpu spent on refcounting protection in single-threaded 965). The motivation had been to allow multi-context bufmgr sharing in classic mode, but it wasn't worth the cost.
2007-12-10[965] Hook up DEBUG_BUFMGR output for bufmgr_fake.Eric Anholt
2007-12-07[965] Convert the driver to dri_bufmgr interface and enable TTM.Eric Anholt
This is currently believed to work but be a significant performance loss. Performance recovery should be soon to follow. The dri_bo_fake_disable_backing_store() call was added to allow backing store disable like bufmgr_fake.c did, which is a significant performance win (though it's missing the no-fence-subdata part). This commit is a squash merge of the 965-ttm branch, which had some history I wanted to avoid pulling due to noisiness and brokenness at many points for git-bisecting.
2007-12-07[965] Remove dead code in upload_wm_surfaces.Eric Anholt
2007-12-07[965] Move brw_surface_state stack allocation into the function using it.Eric Anholt
2007-12-05Revert "[965] Add missing flagging of new stage programs for updating stage ↵Eric Anholt
state." I had forgotten part of brw_state_cache.c that made this fix not relevant for master (last_addr comparison and flagging based on cache id). This reverts commit a4642f3d18bdaebaba31e5dee72fe5de9d890ffb.
2007-12-05[965] Add missing flagging of new stage programs for updating stage state.Eric Anholt
Otherwise, choosing a new program wouldn't necessarily update the state, and and an old program could be executed, leading to various sorts of pretty pictures or hangs.
2007-12-03[965] Change constant buffer from state structs to plain batch emission.Eric Anholt
Reduces diff to branch which has a relocation in this state emit.
2007-11-30i965: if source depth to render target is set,Xiang, Haihao
it should be handled in fb_write.
2007-11-30i965: use uncompressed instruction to ensure onlyXiang, Haihao
Pixel Mask Copy is modified as the pixel shader thread turns off pixels based on kill instructions.
2007-11-28i965: update RefCount when using Vertex/Fragment program.Xiang, Haihao
It makes quake4-demo works well on 965.
2007-11-27i965: The jump instruction count is addedXiang, Haihao
to IP pre-increment, and should point to the first instruction after the do instruction of the do-while block of code
2007-11-25intel: Fix relative symlinks.Michel Dänzer
2007-11-20[965] Replace 965 texture format code with common code.Eric Anholt
The only functional difference should be that 965 now gets the optimization where textures default to 16bpp when the screen is 16bpp.
2007-11-20[965] Remove dead exec vfmt code which was replaced by generic vbo code.Eric Anholt
2007-11-19[965] Add INTEL_DEBUG=fall debugging output.Eric Anholt
2007-11-19[965] Convert DBG macro to use FILE_DEBUG_FLAG like i915.Eric Anholt
2007-10-30More vblank cleanups.Michel Dänzer
* Fix crash at context creation in most drivers supporting vblank. * Don't pass vblank sequence or flags to functions that get passed the drawable private already. * Attempt to initialize vblank related drawable private fields just once per drawable. May need more work in some drivers.
2007-10-29Merge branch 'origin'Eric Anholt
2007-10-29Refactor and fix core vblank supportJesse Barnes
Consolidate support for synchronizing to and retrieving vblank counters. Also fix the core vblank code to return monotonic MSC counters, which are required by some GLX extensions. Adding support for multiple pipes to a low level driver is fairly easy, the Intel 965 driver provides simple example code (see intel_buffers.c:intelWindowMoved()). The new code bumps the media stream counter extension version to 2 and adds a new getDrawableMSC callback. This callback takes a drawablePrivate pointer, which is used to calculate the MSC value seen by clients based on the actual vblank counter(s) returned from the kernel. The new drawable private fields are as follows: - vblSeq - used for tracking vblank counts for buffer swapping - vblFlags - flags (e.g. current pipe), updated by low level driver - msc_base - MSC counter from the last time the current pipe changed - vblank_base - kernel DRM vblank counter from the last time the pipe changed Using the above variables, the core vblank code (in vblank.c) can calculate a monotonic MSC value. The low level DRI drivers are responsible for updating the current pipe (by setting VBLANK_FLAG_SECONDARY for example in vblFlags) along with msc_base and vblank_base whenever the pipe associated with a given drawable changes (again, see intelWindowMoved for an example of this). Drivers should fill in the GetDrawableMSC DriverAPIRec field to point to driDrawableGetMSC32 and add code for pipe switching as outlined above to fully support the new scheme.
2007-10-26Merge branch '965-glsl'Zou Nan hai
Conflicts: src/mesa/drivers/dri/i965/brw_sf.h src/mesa/drivers/dri/i965/intel_context.c