Age | Commit message (Collapse) | Author |
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As part of the DRI driver interface rewrite I merged __DRIscreenPrivate
and __DRIscreen, and likewise for __DRIdrawablePrivate and
__DRIcontextPrivate. I left typedefs in place though, to avoid renaming
all the *Private use internal to the driver. That was probably a
mistake, and it turns out a one-line find+sed combo can do the mass
rename. Better late than never.
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This adds missing pkg-config lookup for intel and moves the radeon
lookup into a case...esac so it's only looked up when one or more of
the radeon drivers are enabled.
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Conflicts:
configs/darwin
src/gallium/auxiliary/util/u_clear.h
src/gallium/state_trackers/xorg/xorg_exa_tgsi.c
src/mesa/drivers/dri/i965/brw_draw_upload.c
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This is part of the GL_EXT_draw_buffers2 extension and part of GL 3.0.
The ctx->Color.ColorMask field is now a 2-D array. Until drivers are
modified to support per-buffer color masking, they can just look at
the 0th color mask.
The new _mesa_ColorMaskIndexed() function will be called by
glColorMaskIndexedEXT() or glColorMaski().
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Conflicts:
src/gallium/auxiliary/util/u_network.c
src/gallium/auxiliary/util/u_network.h
src/gallium/drivers/i915/i915_state.c
src/gallium/drivers/trace/tr_rbug.c
src/gallium/state_trackers/vega/bezier.c
src/gallium/state_trackers/vega/vg_context.c
src/gallium/state_trackers/xorg/xorg_crtc.c
src/gallium/state_trackers/xorg/xorg_driver.c
src/gallium/winsys/xlib/xlib_brw_context.c
src/mesa/main/mtypes.h
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Caught by clang.
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Caught by clang.
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Saves another 600 bytes or so of code.
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Saves ~2KB of code.
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Saves ~480 bytes of code.
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Conflicts:
src/mesa/main/version.h
src/mesa/state_tracker/st_atom_shader.c
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Conflicts:
src/gallium/state_trackers/xorg/xorg_xv.c
src/mesa/drivers/dri/intel/intel_span.c
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Now that XRGB is supported, we don't need to hack around cases of an RGBA
format buffer with an internal format of GL_RGB.
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It turns out that 965 and friends cannot actually render to an xRGB
surfaces. Instead, the surface has to be RGBA with writes to alpha
disabled and the blend function modified to always use 1.0 for
destination alpha.
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Since the texformat branch merge, the value of intel_renderbuffer::texformat
is just a copy of gl_renderbuffer::Format.
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The MaxCombinedTextureImageUnits is the total number of samplers that can
be bound between vertex, geometry, and fragment, not 0. This should report
the correct value on 965 now. Other DRI drivers may also need updating if
their MaxVertexTextureImageUnits != 0 (for example, if using the sw vertex
pipeline).
It's not clear to me if there's going to be a valid value for this
limit other than MaxTextureImageUnits + MaxVertexTextureImageUnits (+
MaxGeometryTextureImageUnits eventually). If not, then we should probably
just move this into the core at Get time.
Bug #25518 (wine regression). Fixes piglit vp-combined-image-units.
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Bug #25628. Fixes piglit case glsl-vs-sqrt-zero.
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Bug #25194.
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This really isn't supported at this point. GEM's been in the kernel for
a year, and the fake bufmgr never really worked.
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The padding was there to indicate the amount of space left from the
number of expected bytes in the struct minus allocated bits. But
uint bitfields get packed so that they don't cross uint boundaries, and we
ended up allocating an extra dword to hold the pad field!
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Add a GLbitfield64 type and several macros to operate on 64-bit
fields. The OutputsWritten field of gl_program is changed to use that
type. This results in a fair amount of fallout in drivers that use
programs.
No changes are strictly necessary at this point as all bits used are
below the 32-bit boundary. Fairly soon several bits will be added for
clip distances written by a vertex shader. This will cause several
bits used for varyings to be pushed above the 32-bit boundary. This
will affect any drivers that support GLSL.
At this point, only the i965 driver has been modified to support this
eventuality.
I did this as a "squash" merge. There were several places through the
outputswritten64 branch where things were broken. I foresee this
causing difficulties later for bisecting. The history is still
available in the branch.
Conflicts:
src/mesa/drivers/dri/i965/brw_wm.h
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This should fix TXB on G45 and older in the GLSL case.
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New comments should explain some of the confusion about how this message
works.
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Fixing this is a prereq for avoiding flagging all state at new
batch time. Eliminating that still causes problems, though (notably
glean logicOp fails on my GM965).
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Saves CPU time, resulting in a 2.5% FPS win on ETQW.
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They're the same regardless of execution width for 8, 4x2, and 16.
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This is a 2.9% (+/-.3%) performance win for my GL demo, which hits MAD
sequences for matrix transforms.
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The cube map array index arg is always present.
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Instead of doing math based on the (broken for VBO && offset != 0)
input->count number, just use the BO size. Fixes assertion failure in ETQW.
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This didn't work for quad/quadstrips at all, and for all other primitive types
it only worked when they were unclipped.
Fix up the former in gs stage (could probably do without these changes and
instead set QuadsFollowProvokingVertexConvention to false), and the rest in
clip stage.
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Previously, we'd load linearly from ParameterValues[0] for the constants,
though ParameterValues[1] may not equal ParameterValues[0] + 4. Additionally,
the STATE_VAL type paramters didn't get updated.
Fixes piglit vp-constant-array-huge.vpfp and ET:QW object locations.
Bug #23226.
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Fixes piglit vp-sge-alias test, and the googleearth ground shader. \o/
Bug #22228
(cherry picked from commit 56ab92bad8f1d05bc22b8a8471d5aeb663f220de)
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Fixes piglit arl.vp.
(cherry picked from commit d52d78b4bcd6d4c0578f972c0b8ebac09e632196)
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For an app that's blowing out the state cache, like sauerbraten, the
memset of the giant arrays ended up taking 11% of the CPU even when only a
"few" of the entries got used. With this, the WM program compile drops back
down to 1% of CPU time.
Bug #24981 (bisected to BRW_WM_MAX_INSN increase).
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