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path: root/src/mesa/drivers/dri/i965
AgeCommit message (Expand)Author
2009-07-31Rename TGSI LOOP instruction to better match theri usage.Michal Krol
2009-07-30i965: Postpone ff_sync message in CLIP kernel on IGDNGXiang, Haihao
2009-07-20i965: Don't clip everything if FRONT_AND_BACK culling while culling disabled.Eric Anholt
2009-07-16i965: Add missing state dependency of sf_unit on _NEW_BUFFERS.Eric Anholt
2009-07-15i965: the offset of any branch/jump instruction is in unit of 64bits on IGDNGXiang, Haihao
2009-07-13i965: add support for new chipsetsXiang, Haihao
2009-07-07i965: Remove BRW_NEW_INPUT_VARYINGEric Anholt
2009-07-02i965: fixes for JMPIXiang, Haihao
2009-06-30i965: Increase G4X default VS URB allocation to actually allow 32 threads.Eric Anholt
2009-06-30i965: first attempt at handling URB overflow when there's too many vs outputsBrian Paul
2009-06-30i965: use BRW_MAX_MRFBrian Paul
2009-06-30i965: use BRW_MAX_GRF, BRW_MAX_MRFBrian Paul
2009-06-30i965: move BRW_MAX_GRF, define BRW_MAX_MRFBrian Paul
2009-06-30i965: defined BRW_MAX_MRFBrian Paul
2009-06-30i965: comments and a new assertionBrian Paul
2009-06-29intel: Move note_unlock() implementation to the one place it's needed.Eric Anholt
2009-06-26i965: fix fetching constants from constant buffer in glsl pathRoland Scheidegger
2009-06-23i965: Set the max index buffer address correctly according to the docs.Eric Anholt
2009-06-23i965: Don't set a reserved bit in MI_FLUSH.Eric Anholt
2009-06-23i965: Fix packed depth/stencil textures to be Y-tiled as well.Eric Anholt
2009-06-19intel: Also get the DRI2 front buffer when doing front buffer reading.Eric Anholt
2009-06-19intel: Update Mesa state before span setup in glReadPixels.Eric Anholt
2009-06-19i965: initial code for loops in vertex programsBrian Paul
2009-06-19i965: asst clean-ups, etc in brw_vs_emit()Brian Paul
2009-06-19i965: asst clean-ups, var renaming in brw_wm_emit_glsl()Brian Paul
2009-06-17i965: Add decode for the G4X x,y offset in surface state.Eric Anholt
2009-06-17i965: Fix up texture layout for small things with wide pitches (tiled)Eric Anholt
2009-06-17i965: Fall back or appropriately adjust offsets of drawing to tiled regions.Eric Anholt
2009-06-16Merge branch 'mesa_7_5_branch'Brian Paul
2009-06-16i965: fix bugs in projective texture coordinatesBrian Paul
2009-06-16i965: handle OPCODE_SWZ in the glsl pathRoland Scheidegger
2009-06-12i965: interpolate colors with perspective correction by defaultBrian Paul
2009-06-04intel: Add support for tiled textures.Eric Anholt
2009-06-02i965: Support OPCODE_TRUNC in the brw_wm_fp.c code.Eric Anholt
2009-05-21i965: fix whitespace in brw_tex_layout.cEric Anholt
2009-05-21i956: Make state dependency of SF on drawbuffer bounds match Mesa's.Eric Anholt
2009-05-21i965: rename var: s/tmp/vs_inputs/Brian Paul
2009-05-14i965: Fix varying payload reg assignment for the non-GLSL-instructions path.Eric Anholt
2009-05-14i965: Fix register allocation of GLSL fp inputs.Eric Anholt
2009-05-14i965: fix 1D texture borders with GL_CLAMP_TO_BORDERRobert Ellison
2009-05-12i965: enable additional code in emit_fb_write()Brian Paul
2009-05-12i965: increase BRW_EU_MAX_INSNBrian Paul
2009-05-12i965: commentBrian Paul
2009-05-11i965: handle extended swizzle terms (0,1) in get_src_reg()Brian Paul
2009-05-08i965: improve debug loggingRobert Ellison
2009-05-08i965: fix segfault on low memory conditionsRobert Ellison
2009-05-08intel: Add a metaops version of glGenerateMipmapEXT/SGIS_generate_mipmaps.Eric Anholt
2009-05-08i965: const qualifiersBrian Paul
2009-05-08i965: don't use GRF regs 126,127 for WM programsBrian Paul
2009-05-07i965: relAddr local var (to make debug/test a little easier)Brian Paul