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path: root/src/mesa/drivers/dri/i965
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2009-09-08i965: Add support for ARB_depth_clamp.Eric Anholt
2009-09-08i965: Respect spec requirement for pixel shader computed depth with no zbuffer.Eric Anholt
2009-09-08i965: Set NULL WM surfaces as tiled according to requirement by specs.Eric Anholt
2009-09-08i965: Use the renderbuffer surface size instead of region size for WM surfaces.Eric Anholt
For drawing to lower mipmap levels, the region size makes the renderbuffer be the size of the lowest level, instead of the current level. On DRI1, Brian previously found that the RB size was incorrect, so leave this broken there.
2009-09-08i965: #include clean-upsBrian Paul
2009-09-08i965: use _mesa_is_bufferobj()Brian Paul
2009-09-04i965: Don't set the complete field when there is more VUE yet to come.Eric Anholt
This should help with things like lightsmark, but I don't have a testcase for this commit.
2009-09-04i965: Add support for 2 threads in the GS.Eric Anholt
This brings noop vertex shader throughput from 6.8M verts/sec to 10.4M verts/sec using GL_QUADs on my GM45.
2009-09-04i965: Add support for KIL_NV in brw_wm_emit.cEric Anholt
I ran into this lack of support when writing a shader that always discarded the fragments.
2009-09-03intel: Add support for ARB_sync.Eric Anholt
We currently weasel out of supporting the timeout parameter, but otherwise this extension looks ready, and should make the common case happy.
2009-09-02Revert "i965: Use VBOs in the VBO module on 965, now that we have ↵Eric Anholt
ARB_map_buffer_range." This reverts commit 00413d87426f14df47d90ba3c995e1889e9f88ca. Even with fixes, using ARB_map_buffer_range in the VBO module isn't showing up as a significant win, and some cases apparently regressed. Bug #23624.
2009-09-02i965: CS FENCE in URB_FENCE is 11-bits wideXiang, Haihao
2009-09-02i965: validate sf stateXiang, Haihao
2009-08-29i965: Fix segfault with ARB_oq CheckQuery when results are already fetched.Eric Anholt
2009-08-29i965: Support PROGRAM_ENV_PARAMs in brw_vs_emit.cEric Anholt
2009-08-28i965: Use VBOs in the VBO module on 965, now that we have ARB_map_buffer_range.Eric Anholt
This looks like it's a small win on blender.
2009-08-28i965: Implement ARB_oq CheckQuery in the intended way.Eric Anholt
Previously we blocked because I hadn't added the libdrm function. Now it's there, so update your libdrm.
2009-08-26i965: Increase assmebly shader program parameter limitsIan Romanick
Increase the number of native program parameters to the same values exposed by GLSL.
2009-08-26ARB prog: Change handling of program parameter limitsIan Romanick
Several changes are made to program parameter limits. Several of the non-NATIVE limits are set higher. All of the NATIVE limits are set to zero in the core Mesa code. Each driver must set the actual value in its context creation routine. If the NATIVE value remains zero, this indicates that hardware shaders may not be supported. Each of the preceeding changes matches the bahavior of Apple's shader assembler, so it seems safe. Finally, we limit the value of MaxEnvParams to be no greater than MaxNativeAttribs. At least one case has been found where an application does the wrong thing if MaxNativeAttribs < MaxEnvParams. See also bugzilla #23490.
2009-08-26i965: init the tex_units_used fieldBrian Paul
2009-08-26i965: fix incorrect tex unit in emit_tex() and emit_txb()Brian Paul
The instructions we're translating already went through the brw_wm_pass_fp() function which does the sampler->texture unit mapping. We were applying the sample->unit mapping a second time in the GLSL texture emitters. Often, this made no difference but other times it could lead to accessing an invalid texture and could cause a GPU lockup.
2009-08-26i965: clean-up tex target switchesBrian Paul
2009-08-26i965: added texture unit sanity checkBrian Paul
Check that all the textures needed by the current fragment program actually exist and are valid.
2009-08-26i965: keep track of which texture units the fragment shader accessesBrian Paul
We'll use this for debug/sanity checking.
2009-08-26i965: clean up texture target switchesBrian Paul
2009-08-25i965: add some texture unit/target assertionsBrian Paul
2009-08-22i965: Implement frag prog DPH like DP4Ian Romanick
DPH can output to any component, not just to X. This allows fpalu.c to run without hitting the assertion in emit_dph.
2009-08-19intel: Fix failure to commit -a --amend before last push.Eric Anholt
2009-08-19intel: Align cubemap texture height to its padding requirements.Eric Anholt
2009-08-15i965: disable bounds checking on arrays with stride 0Roland Scheidegger
if stride is 0 we cannot use count as max index for bounds checking, since the hardware will simply return 0 as data for indices failing bounds check. If stride is 0 any index should be valid hence simply disable bounds checking in this case. This fixes bugs introduced with e643bc5fc7afb563028f5a089ca5e38172af41a8.
2009-08-14i965: Add support for GL_ARB_seamless_cube_mapIan Romanick
2009-08-13i965: fix cube map on IGDNGXiang, Haihao
2009-08-12Merge branch 'new-frag-attribs'Brian Paul
This branch introduces new FRAG_ATTRIB_FACE and FRAG_ATTRIB_PNTC fragment program inputs for GLSL gl_FrontFacing and gl_PointCoord. Before, these attributes were packed with the FOG attribute. That made things complicated elsewhere.
2009-08-12i965: Make the cube mapping RCP use a writemask.Eric Anholt
Fixes cube mapping since the scalar changes.
2009-08-12i965: Allocate destination registers for GLSL TEX instructions contiguously.Eric Anholt
This matches brw_wm_pass*.c behavior, and fixes the norsetto shadow demo. Bug #19489
2009-08-12i965: drop dead scalar handling in GLSL.Eric Anholt
2009-08-12i965: Correct brw_wm_nr_args for WM_DELTAXY and WM_PIXELXY.Eric Anholt
2009-08-12i965: Drop GLSL ABS code, which is translated away in brw_wm_fp.Eric Anholt
2009-08-12i965: Drop code for emitting OPCODE_SUB, since brw_wm_fp.c makes it an ADD.Eric Anholt
2009-08-12i965: Store the dispatch width in the WM compile struct.Eric Anholt
I'll be using this in merging brw_wm_emit.c and brw_wm_glsl.c
2009-08-12i965: Handle scalar result swizzling in shared GLSL/non-GLSL code.Eric Anholt
This is preparation for merging of brw_wm_glsl.c and brw_wm_emit.c, and glsl.c doesn't swizzle channel results around.
2009-08-12i965: Flag ARL-using programs as requiring brw_wm_glsl.cEric Anholt
This doesn't fix the glean testcase, but I guess it provides hope.
2009-08-12i965: Remove some unused WM opcode args.Eric Anholt
2009-08-12i965: Avoid re-uploading the index buffer when we don't need to.Eric Anholt
No performance difference proven at 95% confidence with my GLSL demo (n=10).
2009-08-12vbo: Avoid extra validation of DrawElements.Eric Anholt
This saves mapping the index buffer to get a bounds on the indices that drivers just drop on the floor in the VBO case (cache win), saves a bonus walk of the indices in the CheckArrayBounds case, and other miscellaneous validation. On intel it's a particularly a large win (50-100% in my app) because even though we let the indices stay in both CPU and GPU caches, we still end up waiting for the GPU to be done with the buffer before reading from it. Drivers that want the min/max_index fields must now check index_bounds_valid and use vbo_get_minmax_index before using them.
2009-08-12i965: Use _MaxElement instead of index-calculated min/max for VBO bounds.Eric Anholt
2009-08-07i965: Add a note justifying domain choice for the SF VP.Eric Anholt
2009-08-07i965: Replace the subroutine-skipping jump in VS with a NOP if it's a NOP.Eric Anholt
This showed a 1.9% (+/-.3%, n=3) improvement in OA performance with high geometry settings.
2009-08-07i965: minor context commentsBrian Paul
2009-08-05i965: Fix source depth reg setting for FSes reading and writing to depth.Eric Anholt
For some IZ setups, we'd forget to account for the source depth register being present, so we'd both read the wrong reg, and write output depth to the wrong reg. Bug #22603.