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path: root/src/mesa/drivers/dri/i965
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2009-11-21i965: Fix several memory leaks on exit.Eric Anholt
Bug #25194.
2009-11-17Merge branch 'outputswritten64'Ian Romanick
Add a GLbitfield64 type and several macros to operate on 64-bit fields. The OutputsWritten field of gl_program is changed to use that type. This results in a fair amount of fallout in drivers that use programs. No changes are strictly necessary at this point as all bits used are below the 32-bit boundary. Fairly soon several bits will be added for clip distances written by a vertex shader. This will cause several bits used for varyings to be pushed above the 32-bit boundary. This will affect any drivers that support GLSL. At this point, only the i965 driver has been modified to support this eventuality. I did this as a "squash" merge. There were several places through the outputswritten64 branch where things were broken. I foresee this causing difficulties later for bisecting. The history is still available in the branch. Conflicts: src/mesa/drivers/dri/i965/brw_wm.h
2009-11-16i965: Use MESA_FORMAT_AL1616 when appropriateIan Romanick
2009-11-13i965: Share OPCODE_TXB between brw_wm_emit.c and brw_wm_glsl.cEric Anholt
This should fix TXB on G45 and older in the GLSL case.
2009-11-13i965: Share OPCODE_TEX between brw_wm_emit.c and brw_wm_glsl.c.Eric Anholt
New comments should explain some of the confusion about how this message works.
2009-11-13i965: Clean up emit_tex a bit.Eric Anholt
2009-11-13Merge remote branch 'origin/mesa_7_6_branch'Eric Anholt
2009-11-13i965: Flag BRW_NEW_CONTEXT on some context state.Eric Anholt
Fixing this is a prereq for avoiding flagging all state at new batch time. Eliminating that still causes problems, though (notably glean logicOp fails on my GM965).
2009-11-13i965: Remove an unused cache_item field.Eric Anholt
2009-11-13i965: Remove long dead structures for ffvertex_prog.c.Eric Anholt
2009-11-13i965: Use bo_map instead of subdata to upload the bits of constant buffer.Eric Anholt
Saves CPU time, resulting in a 2.5% FPS win on ETQW.
2009-11-13i965: Validate the number of URB entries selected for the VS.Eric Anholt
2009-11-13i965: Clean up Ironlake sampler type definitions.Eric Anholt
They're the same regardless of execution width for 8, 4x2, and 16.
2009-11-13i965: Avoid moving the current value back into the accumulator for MAD.Eric Anholt
This is a 2.9% (+/-.3%) performance win for my GL demo, which hits MAD sequences for matrix transforms.
2009-11-12i965: Fix Ironlake shadow comparisons.Eric Anholt
The cube map array index arg is always present.
2009-11-12i965: Fix VBO last-valid-offset setup on Ironlake.Eric Anholt
Instead of doing math based on the (broken for VBO && offset != 0) input->count number, just use the BO size. Fixes assertion failure in ETQW.
2009-11-11i965: fix EXT_provoking_vertex supportRoland Scheidegger
This didn't work for quad/quadstrips at all, and for all other primitive types it only worked when they were unclipped. Fix up the former in gs stage (could probably do without these changes and instead set QuadsFollowProvokingVertexConvention to false), and the rest in clip stage.
2009-11-10i965: Fix VS constant buffer value loading.Eric Anholt
Previously, we'd load linearly from ParameterValues[0] for the constants, though ParameterValues[1] may not equal ParameterValues[0] + 4. Additionally, the STATE_VAL type paramters didn't get updated. Fixes piglit vp-constant-array-huge.vpfp and ET:QW object locations. Bug #23226.
2009-11-10i965: Unalias src/dst registers for SGE and friends.Eric Anholt
Fixes piglit vp-sge-alias test, and the googleearth ground shader. \o/ Bug #22228 (cherry picked from commit 56ab92bad8f1d05bc22b8a8471d5aeb663f220de)
2009-11-10i965: Allow use of PROGRAM_LOCAL constants in ARB_vp.Eric Anholt
Fixes piglit arl.vp. (cherry picked from commit d52d78b4bcd6d4c0578f972c0b8ebac09e632196)
2009-11-10Merge remote branch 'origin/mesa_7_6_branch'Eric Anholt
2009-11-10i965: avoid memsetting all the BRW_WM_MAX_INSN arrays for every compile.Eric Anholt
For an app that's blowing out the state cache, like sauerbraten, the memset of the giant arrays ended up taking 11% of the CPU even when only a "few" of the entries got used. With this, the WM program compile drops back down to 1% of CPU time. Bug #24981 (bisected to BRW_WM_MAX_INSN increase).
2009-11-10i965: Add a note explaining the data cache domain.Eric Anholt
2009-11-10i965: Unalias src/dst registers for SGE and friends.Eric Anholt
Fixes piglit vp-sge-alias test, and the googleearth ground shader. \o/ Bug #22228
2009-11-10i965: Allow use of PROGRAM_LOCAL constants in ARB_vp.Eric Anholt
Fixes piglit arl.vp.
2009-11-06i965: Use Compr4 instruction compression mode on G4X and newer.Eric Anholt
No statistically significant performance difference at n=3 with either openarena or my GL demo, but cutting program size seems like a good thing to be doing for the hypothetical app that has a working set near icache size.
2009-11-06i965: Share min/max between brw_wm_emit.c and brw_wm_glsl.cEric Anholt
2009-11-06i965: Share emit_fb_write() between brw_wm_emit.c and brw_wm_glsl.cEric Anholt
This should fix issues with antialiased lines in GLSL.
2009-11-06i965: Share most of the WM functions between brw_wm_glsl.c and brw_wm_emit.cEric Anholt
The PINTERP code should be faster for brw_wm_glsl.c now since brw_wm_emit.c's had been improved, and pixel_w should no longer stomp on a neighbor to dst.
2009-11-06i965: Share math functions between brw_wm_glsl.c and brw_wm_emit.c.Eric Anholt
2009-11-06i965: Share the sop opcodes between brw_wm_glsl.c and brw_wm_emit.c.Eric Anholt
2009-11-06i965: Share OPCODE_MAD between brw_wm_glsl.c and brw_wm_emit.cEric Anholt
2009-11-06i965: Share the DP3, DP4, and DPH between brw_wm_glsl.c and brw_wm_emit.cEric Anholt
2009-11-06i965: Add generic GLSL code for unaliasing a 3-arg opcode, and share LRP code.Eric Anholt
2009-11-06i965: Use a normal alu1 emit for OPCODE_TRUNC.Eric Anholt
2009-11-06i965: Share basic ALU ops between brw_wm_glsl and brw_wm_emit.cEric Anholt
This drops support for get_src_reg_imm in these, but the prospect of getting brw_wm_pass*.c onto our GLSL path is well worth some temporary pain.
2009-11-06i965: Collect GLSL src/dst regs up in generic code.Eric Anholt
This matches brw_wm_emit.c, which we'll be using shortly. There's a possible penalty here in that we'll allocate registers for unused channels, since we aren't doing ref tracking like brw_wm_pass*.c does. However, my measurements on GM965 don't show any for either OA or UT2004 with the GLSL path forced.
2009-11-06i965: Always pass the size argument to brw_cache_data.Eric Anholt
This keeps the individual state files from having to export their structures for brw_state_cache initialization.
2009-11-06i965: Remove an XXX comment for testing some code that seems to work.Eric Anholt
2009-11-06intel: Use PIPE_CONTROL on gen4 hardware for doing pipeline flushing.Eric Anholt
This should do all the things that MI_FLUSH did, but it can be pipelined so that further rendering isn't blocked on the flush completion unless necessary.
2009-11-03intel: avoid unnecessary front buffer flushing/updatingBrian Paul
Before, if we just called glXMakeCurrent() and didn't render anything we'd still trigger a flushFrontBuffer() call. Now only set the intel->front_buffer_dirty field at state validation time just before we draw something. NOTE: additional calls to intel_check_front_buffer_rendering() might be needed if I missed some rendering paths.
2009-10-30i965: Add an index assert on get_fp_inst array like other compiler arrays.Eric Anholt
2009-10-30i965: Fix BRW_WM_MAX_INSN to reflect current limits.Eric Anholt
Part of fixing bug #24355.
2009-10-29intel: update intel_create_renderbuffer(format), add XRGB supportBrian Paul
Pass a gl_format to intel_create_renderbuffer() instead of GLenum. Add cases for MESA_FORMAT_XRGB8888 textures and renderbuffers. However, we don't yet create any renderbuffers or textures with that format. It seems the default alpha value is zero instead of one. Need to investigate that first.
2009-10-29i965: indentation fixBrian Paul
2009-10-29i965: make brw_sf_prog_key::sprite_origin_lower_left one bitBrian Paul
Shrinks size of key to 8 bytes from 12. Note that progs/demos/spriteblast.c is still broken.
2009-10-29i965: make brw_wm_prog_key a little smallerBrian Paul
GLushort is big enough for the swizzle and origin fields. The key could probably be made smaller still by re-ordering things. I'll hold off on that until after the outputswritten64 branch is merged. The key will get a little larger again with the GLbitfield64 fields.
2009-10-29i965: avoid shader translation on window resizeBrian Paul
If the fragment shader doesn't use FRAG_ATTRIB_WPOS (gl_FragCoord) we don't need to worry about the window size and origin in brw_wm_populate_key(). This avoids re-generating the i965 shader code when a window is resized. Issue spotted by Keith Whitwell.
2009-10-29i965: define, use BRW_MAX_DRAW_BUFFERSBrian Paul
i965 might support more than 4 color draw buffers. But if not, this protects from breakage if the Mesa limit is raised.
2009-10-29i965: remove unused varBrian Paul