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path: root/src/mesa/drivers/dri/i965
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2009-03-06i965: check if we run out of GRF/temp registersBrian Paul
Before this change we would up emitting instructions with invalid register numbers. This typically (but not always) hung the GPU. For now, just prevent emitting bad instructions to avoid hangs. Still need to do some kind of proper error recovery.
2009-03-06i965: bump up BRW_EU_MAX_INSNBrian Paul
This is the size of the intermediate instruction buffer.
2009-03-06i965: commentsBrian Paul
2009-03-06i965: comments and minor clean-upsBrian Paul
2009-03-06i965: avoid unnecessary calls to brw_wm_is_glsl()Brian Paul
This function scans the shader to see if it has any GLSL features like conditionals and loops. Calling this during state validation is expensive. Just call it when the shader is given to the driver and save the result. There's some new/temporary assertions to be sure we don't get out of sync on this.
2009-03-05i965: Stop dumping programs after the first all-zeroes entry.Eric Anholt
2009-03-05intel: Add always_flush_batch driconf option for making small batchbuffers.Eric Anholt
This can improve debugging with INTEL_DEBUG=batch,sync by giving smaller batchbuffers.
2009-03-05intel: Add always_flush_cache driconf option for debugging cache flush failure.Eric Anholt
I keep wanting to hack this knob in as a one-time thing, so it seemed useful to have all the time.
2009-03-05i965: Remove dead flushing code.Eric Anholt
2009-03-05i965: comments and formatting fixesBrian Paul
2009-03-05i965: fix emit_math1() function used for scalar instructionsBrian Paul
Instructions such as RCP, RSQ, LOG must smear the result of the function across the dest register's X, Y, Z and W channels (subject to write masking). Before this change, only the X component was getting written. Among other things, this fixes cube map texture sampling in GLSL shaders (since cube lookups involve normalizing the texcoord).
2009-03-05i965: init dest reg CondMask = COND_TR (the proper default)Brian Paul
Plus fix up a debug printf.
2009-03-04i965: add software fallback for conformant 3D textures and GL_CLAMPRobert Ellison
The i965 hardware cannot do GL_CLAMP behavior on textures; an earlier commit forced a software fallback if strict conformance was required (i.e. the INTEL_STRICT_CONFORMANCE environment variable was set) and 2D textures were used, but it was somewhat flawed - it could trigger the software fallback even if 2D textures weren't enabled, as long as one texture unit was enabled. This fixes that, and adds software fallback for GL_CLAMP behavior with 1D and 3D textures. It also adds support for a particular setting of the INTEL_STRICT_CONFORMANCE environment variable, which forces software fallbacks to be taken *all* the time. This is helpful with debugging. The value is: export INTEL_STRICT_CONFORMANCE=2
2009-03-02mesa: use Stencil._Enabled field instead of Stencil.EnabledBrian Paul
2009-02-28mesa: rename, reorder FRAG_RESULT_x tokensBrian Paul
s/FRAG_RESULT_DEPR/FRAG_RESULT_DEPTH/ s/FRAG_RESULT_COLR/FRAG_RESULT/COLOR/ Remove FRAG_RESULT_COLH (NV half-precision) output since we never used it. Next, we might merge the COLOR and DATA outputs (COLOR0, COLOR1, etc).
2009-02-27i965: texture fixes: bordered textures, fallback renderingRobert Ellison
i965 doesn't natively support GL_CLAMP; it treats it like GL_CLAMP_TO_EDGE, which fails conformance tests. This fix adds a clause to the check_fallbacks() test to check whether GL_CLAMP is in use on any enabled 2D texture. If so, and if strict conformance is required (via INTEL_STRICT_CONFORMANCE), a software fallback is mandated. In addition, validate textures *before* checking for fallbacks, rather than after; otherwise, the texture state is never validated and can't be trusted. (In particular, if texturing is enabled and the sampler would access any level beyond level 0 of a texture, the sampler will segfault, because texture validation sets the firstLevel and lastLevel fields of a texture object so that the valid levels will be mapped and accessed correctly. If texture validation doesn't occur, only level 0 is accessed correctly, and that only because firstLevel and lastLevel happen to be set to 0.)
2009-02-26i965: rename draw_regions -> color_regionsroot
Be a little more specific about what these are.
2009-02-26mesa: replace old prog_instruction::Sampler field with Aux fieldBrian Paul
The i965 driver needs an extra instruction field for color output information. It was using the Sampler field for this. Use the Aux field instead. This will probaby be revisited at some point...
2009-02-26i965: whitespace/indentation fixesBrian Paul
2009-02-26i965: fix for RHW workaroundXiang, Haihao
It is possible that an object whose vertices all are outside of a view plane is passed to clip thread due to the RHW workaround. This object should be rejected by clip thread. Fix bug #19879
2009-02-25i965: Rename CMD_CONST_BUFFER_STATE to the CS_URB_STATE used in the docs.Eric Anholt
2009-02-23i965: fix line stipple fallback for GL_LINE_STRIP primitivesRobert Ellison
When doing line stipple, the stipple count resets on each line segment, unless the primitive is a GL_LINE_LOOP or a GL_LINE_STRIP. The existing code correctly identifies the need for a software fallback to handle conformant line stipple on GL_LINE_LOOP primitives, but neglects to make the same assessment on GL_LINE_STRIP primitives. This fixes it so they match.
2009-02-21i965: Fix render target read domains.Eric Anholt
We were asking for something illegal (write_domain != 0 && read_domains != write_domain) because at the time of writing the region surfaces were used for texturing occasionally as well, and we weren't really clear on the model GEM was going to use. This reliably triggered a kernel bug with domain handling, resulting in oglconform mustpass.c failure. Of course, it only became visible after 01bc4d441fd6821ad9fc20d5e9544e4e587e4ff0 cleaned up some gratuitous flushing.
2009-02-20i965: use the new prog_instruction::TexShadow fieldBrian Paul
GLSL shadow() sampler calls are properly propogated down to the driver now. The glean glsl1 shadow() tests work (except for the alpha channel).
2009-02-20i965: check depth_mode in translate_tex_format() for MESA_FORMAT_S8_Z24Brian Paul
Note that I24X8 vs. A24X8 vs. L24X8 doesn't seem to make any difference for texture/shadow compare, however.
2009-02-20i965: separate emit_op() and emit_tex_op() functionsBrian Paul
2009-02-20i965: update comment, use const qualifierBrian Paul
2009-02-20i965: var renaming, clean-upBrian Paul
2009-02-20i965: added commentBrian Paul
2009-02-20i965: additional debug outputBrian Paul
2009-02-17i965: Fix fallback on stencil drawing to fbo when the visual lacks stencil.Eric Anholt
Noticed this with the fbotexture demo.
2009-02-17intel: Clean up several 965 memory leaks on context destroy.Eric Anholt
2009-02-16i965: tell GLSL compiler to emit code using condition codesBrian Paul
The default for EmitCondCodes got flipped when gallium-0.2 was merged. This fixes GLSL if/else/endif regressions. Drivers that use GLSL should always explicitly set the flag to be safe.
2009-02-13i965: rewrite the code for handling shader subroutine callsBrian Paul
Previously, the prog_instruction::Data field was used to map original Mesa instructions to brw instructions in order to resolve subroutine calls. This was a rather tangled mess. Plus it's an obstacle to implementing dynamic allocation/growing of the instruction buffer (it's still a fixed size). Mesa's GLSL compiler emits a label for each subroutine and CAL instruction. Now we use those labels to patch the subroutine calls after code generation has been done. We just keep a list of all CAL instructions that needs patching and a list of all subroutine labels. It's a simple matter to resolve them. This also consolidates some redundant post-emit code between brw_vs_emit.c and brw_wm_glsl.c and removes some loops that cleared the prog_instruction::Data fields at the end. Plus, a bunch of new comments.
2009-02-13i965: add missing break for OPCODE_RET caseBrian Paul
This doesn't effect correctness, but we were emitting an extraneous ADD.
2009-02-13i965: the return value of translate_insn() is never used. Make it void.Brian Paul
2009-02-13i965: minor clean-upsBrian Paul
2009-02-13i965: code clean-ups, comments, and minor refactoringBrian Paul
2009-02-13i965: updated commentsBrian Paul
2009-02-13i965: more reformatting/clean-upBrian Paul
2009-02-13i965: s/__inline/INLINE/Brian Paul
2009-02-13i965: formatting and indentation fixesBrian Paul
2009-02-13i965: fix inconsistant indentation in brw_wm.cBrian Paul
2009-02-02i965: Remove brw->attribs now that we can just always look in the GLcontext.Eric Anholt
2009-02-02i965: Delete old metaops code now that there are no remaining consumers.Eric Anholt
2009-01-30i965: bump texture limit to 4kx4kKeith Packard
Rendering and textures are limited to 8kx8k, but mesa limits things to 4kx4k, and magic guard band stuff may break on 8kx8k drawing. This is safe though, and makes compiz work on bigger screens. Signed-off-by: Keith Packard <keithp@keithp.com>
2009-01-30i965: formatting, comments, whitespace clean-upsBrian Paul
2009-01-30Remove stale symlinks to intel/intel_depthstencil.cIan Romanick
2009-01-29i965: use bitfields in brw_sf_unit_key structBrian Paul
2009-01-29i965: fix render to FBO/texture orientation bugsBrian Paul
Anytime we're not rendering to the default/window FBO, need to invert rendering, not just when rendering to a texture. Otherwise, if a FBO consists of a mix of textures and renderbuffers the up/down orientation was inconsistant. Fixes shadowtex.c bad rendering.