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path: root/src/mesa/drivers/dri/i965
AgeCommit message (Expand)Author
2009-08-12i965: Store the dispatch width in the WM compile struct.Eric Anholt
2009-08-12i965: Handle scalar result swizzling in shared GLSL/non-GLSL code.Eric Anholt
2009-08-12i965: Flag ARL-using programs as requiring brw_wm_glsl.cEric Anholt
2009-08-12i965: Remove some unused WM opcode args.Eric Anholt
2009-08-12i965: Avoid re-uploading the index buffer when we don't need to.Eric Anholt
2009-08-12vbo: Avoid extra validation of DrawElements.Eric Anholt
2009-08-12i965: Use _MaxElement instead of index-calculated min/max for VBO bounds.Eric Anholt
2009-08-07i965: Add a note justifying domain choice for the SF VP.Eric Anholt
2009-08-07i965: Replace the subroutine-skipping jump in VS with a NOP if it's a NOP.Eric Anholt
2009-08-07i965: minor context commentsBrian Paul
2009-08-05i965: Fix source depth reg setting for FSes reading and writing to depth.Eric Anholt
2009-08-04i965: Fix dangerous warning I let slip in.Eric Anholt
2009-08-04i965: Respect CondSwizzle in OPCODE_IF.Eric Anholt
2009-08-04i965: Emit conditional code updates as required for GLSL VS if statements.Eric Anholt
2009-08-04i965: Don't set pop_count in the reserved MBZ area of IF statements.Eric Anholt
2009-08-04i965: Print out ELSE and ENDIF src1 arguments like IF does.Eric Anholt
2009-08-04intel: Add support for EXT_provoking_vertex.Eric Anholt
2009-08-04i965: Spell "conditional" correctly.Eric Anholt
2009-08-04i965: Hook up the disassembler for INTEL_DEBUG={wm,vs}.Eric Anholt
2009-08-04i965: Initial import of disasm code from intel-gen4asm.Eric Anholt
2009-08-04i965: warning fixEric Anholt
2009-08-04i965: Fix RECT shadow sampling by not losing the other texcoords.Eric Anholt
2009-08-03i965: Assert that the offset in the VBO is below the VBO size.Eric Anholt
2009-08-03i965: Even if no VS inputs are set, still load some amount of URB as required.Eric Anholt
2009-08-03i965: Make sure the VS URB size is big enough to fit a VF VUE.Eric Anholt
2009-08-03i965: Don't emit bad packets when no VBs are referenced.Eric Anholt
2009-08-03i965: Calculate enabled[] and nr_enabled once and re-use the values.Eric Anholt
2009-07-31Rename TGSI LOOP instruction to better match theri usage.Michal Krol
2009-07-30i965: Postpone ff_sync message in CLIP kernel on IGDNGXiang, Haihao
2009-07-29mesa: add new FRAG_ATTRIB_FACE and FRAG_ATTRIB_PNTC fragment program inputsBrian Paul
2009-07-20i965: Don't clip everything if FRONT_AND_BACK culling while culling disabled.Eric Anholt
2009-07-20i965: Don't clip everything if FRONT_AND_BACK culling while culling disabled.Eric Anholt
2009-07-16i965: Add missing state dependency of sf_unit on _NEW_BUFFERS.Eric Anholt
2009-07-15i965: the offset of any branch/jump instruction is in unit of 64bits on IGDNGXiang, Haihao
2009-07-13i965: add support for new chipsetsXiang, Haihao
2009-07-07i965: Remove BRW_NEW_INPUT_VARYINGEric Anholt
2009-07-04i965: fix fetching constants from constant buffer in glsl pathRoland Scheidegger
2009-07-04i965: Remove bad constant buffer constant-reg-already-loaded optimization.Eric Anholt
2009-07-02i965: fixes for JMPIXiang, Haihao
2009-06-30i965: Increase G4X default VS URB allocation to actually allow 32 threads.Eric Anholt
2009-06-30i965: first attempt at handling URB overflow when there's too many vs outputsBrian Paul
2009-06-30i965: use BRW_MAX_MRFBrian Paul
2009-06-30i965: use BRW_MAX_GRF, BRW_MAX_MRFBrian Paul
2009-06-30i965: move BRW_MAX_GRF, define BRW_MAX_MRFBrian Paul
2009-06-30i965: defined BRW_MAX_MRFBrian Paul
2009-06-30i965: comments and a new assertionBrian Paul
2009-06-29intel: Move note_unlock() implementation to the one place it's needed.Eric Anholt
2009-06-22i965: handle OPCODE_SWZ in the glsl pathRoland Scheidegger
2009-06-17i965: fix 1D texture borders with GL_CLAMP_TO_BORDERRobert Ellison
2009-06-17i965: fix segfault on low memory conditionsRobert Ellison
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