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path: root/src/mesa/drivers/dri/i965
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2008-09-03intel: Fix refcounting on depth buffer initialization in DRI2.Eric Anholt
(Reverts a change to work around the problem on 965).
2008-08-29DRI2: Drop sarea, implement swap buffers in the X server.Kristian Høgsberg
2008-08-29i965: force thread switch after IF/ELSE/ENDIF. partial fix for #16882.Xiang, Haihao
A thread switch is implicitly invoked after the issuance of an IF/ELSE/ENDIF instruction if necessary. Unfortunately it seems sometimes a forced thread switch is needed.
2008-08-29i965: mask control for BREAK/CONT/DO/WHILE. partial fix fox #16882Xiang, Haihao
2008-08-29i965: Push/pop instruction state. partial fix for #16882Xiang, Haihao
2008-08-24Revert "Revert "Merge branch 'drm-gem'""Dave Airlie
This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
2008-08-24Revert "Merge branch 'drm-gem'"Dave Airlie
This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03. Conflicts: src/mesa/drivers/dri/i965/brw_wm_surface_state.c
2008-08-21965: Fix incorrect backface cullingKrzysztof Czurylo
Fix incorrect backface culling for OGL tunnel in wireframe and point mode.
2008-08-21965: Fix color clamping issuesKrzysztof Czurylo
Patch is correctly applied this time.
2008-08-21Formatting changes to ease application of patchesIan Romanick
2008-08-21i965: use dri_bo_subdata in vertex upload to get pwrite used.Eric Anholt
Otherwise, we would ping-pong objects to GTT and back as we did pwrite on indices (flushed and mapped to GTT) and mapped for vertices (moved back to CPU domain). Fixes bug #17180.
2008-08-20i965: fixup format for TFP zero copyDave Airlie
(cherry picked from commit 9bc9e0ecb0fb2069b2c123e665eb2118e358098f which was lost in a merge)
2008-08-20i965: make tex offset override work..Dave Airlie
should fix fd.o 14441 (cherry-picked from commit d4244683a61f66cfb78408a37cf2587587847f96 which was lost in a merge)
2008-08-20i965: Enable GL_ARB_fragment_program_shadow and fix key->shadowtex_mask. ↵Xiang, Haihao
(bug #16852, #16853)
2008-08-08Merge branch 'drm-gem'Eric Anholt
Conflicts: src/mesa/drivers/dri/intel/intel_span.c src/mesa/main/fbobject.c This converts the i915 driver to use the GEM interfaces for object management.
2008-08-08intel-gem: Update to new check_aperture API for classic mode.Eric Anholt
To do this, I had to clean up some of 965 state upload stuff. We may end up over-emitting state in the aperture overflow case, but that should be rare, and I'd rather have the simplification of state management.
2008-08-08965: cleanups to state emission from aperture checking and state ordering.Eric Anholt
2008-08-06i965: update TexSrcUnit for OPCODE_TXBXiang, Haihao
2008-08-05i965: Use program->SamplerUnits[] to get the appropriate texture unit.Xiang, Haihao
inst->TexSrcUnit is used as an index into program->SamplerUnits[] since the commit ade508312c701ce89d3c2cd717994dbbabb4f207, and program->SamplerUnits is a sampler-to-texture-unit mapping.
2008-07-25Merge branch 'master' into drm-gemIan Romanick
Conflicts: src/mesa/drivers/dri/common/dri_bufmgr.c src/mesa/drivers/dri/i965/brw_wm_surface_state.c
2008-07-25i965: fixup format for TFP zero copyDave Airlie
2008-07-25i965: make tex offset override work..Dave Airlie
should fix fd.o 14441
2008-07-24Revert "965: Fix color clamping issues"Ian Romanick
This reverts commit b993d539a76e7f1446890a85e4b61deec4d4162d. The patch was applied incorrectly. Actual fix coming soon. Sorry for the noise.
2008-07-23965: Fix partially transparent textures in Doom 3 engine gamesPawel Pieczul
Numbers of destination depth registers corrected (destination stencil register was sent as depth register).
2008-07-21965: Fix color clamping issuesPawel Pieczul
2008-07-18intel: fix texture border issue. (bug #16697)Xiang, Haihao
2008-07-16Remove redundant initalization of MaxTextureUnitsIan Romanick
2008-07-11drm-gem: Use new GEM ioctls for tiling state, and support new swizzle modes.Eric Anholt
2008-07-08i965: official name for GM45 chipsetXiang, Haihao
2008-07-02set ctx->Const.MaxVertexTextureImageUnits = 0Brian Paul
This disallows vertex shader texture sampling. See bugs 16157, 13838.
2008-06-26intel: Replace sprinkled intel_batchbuffer_flush with MI_FLUSH or nothing.Eric Anholt
Most of these were to ensure that caches got synchronized between 2d (or meta) rendering and later use of the target as a source, such as for texture miptree setup. Those are replaced with intel_batchbuffer_emit_mi_flush(), which just drops an MI_FLUSH. Most of the remainder were to ensure that REFERENCES_CLIPRECTS batchbuffers got flushed before the lock was dropped. Those are now replaced by automatically flushing those when dropping the lock.
2008-06-24Merge commit 'origin/master' into drm-gemEric Anholt
2008-06-24i965: Use the shared intel_pixel_copy.c.Eric Anholt
This disables the textured copy implementation on 965, which didn't appear to work (mesa copypix demo, disable the blit path, move so that regions don't overlap and textured is used, and you get garbage). If we resurrect this for i965, I'd rather it used the 915-style metaops instead. Current metaops code left in place so that whoever picks it up has a reference.
2008-06-24intel: Same pixel function init for everyone now.Eric Anholt
2008-06-24intel: Avoid glBitmap software fallback for blending when no blending occurs.Eric Anholt
Mesa demos tend to leave blending on but in GL_ONE/GL_ZERO, or GL_SRC_ALPHA/GL_ONE_MINUS_SRC_ALPHA with a source alpha of 1.0.
2008-06-24intel: Merge check_blit_fragment_ops between i915/i965.Eric Anholt
Both had some useful bits for the other.
2008-06-21replace __inline and __inline__ with INLINE macroBrian Paul
2008-06-18Merge commit 'origin/master' into drm-gemEric Anholt
2008-06-11[intel-gem] Chase domain flag renaming in the DRM.Eric Anholt
This is an API breakage only.
2008-06-10i965: apply commit 6c1a98e97affb2163e776551eb3a9e669ff99bbf to glslXiang, Haihao
2008-06-08i965: fix OPCODE_TEX when additional ops are neededRoland Scheidegger
2008-06-03Merge commit 'origin/master' into drm-gemKeith Packard
Conflicts: src/mesa/drivers/dri/common/dri_bufmgr.h src/mesa/drivers/dri/intel/intel_bufmgr_ttm.c src/mesa/drivers/dri/intel/intel_bufmgr_ttm.h src/mesa/drivers/dri/intel/intel_ioctl.c
2008-06-03[intel] Convert drivers to using libdrm bufmgr code.Eric Anholt
2008-05-23Emit a flush after the swapbuffers blit, so contents end up on the screen.Eric Anholt
Otherwise, since the MI_FLUSH at the end of every batch had been removed, non-automatic-flushing chips (965) wouldn't get flushed and apps with static rendering would get partial screen contents until the server's blockhandler flush kicked in.
2008-05-20i965: Check fallback before accounting for index/vertex buffer size. fix #16028.Xiang, Haihao
2008-05-07GEM: Remove already-disabled PIPE_CONTROL command.Eric Anholt
This existed to get the icache flushed. However, GEM handles this for us now for sure, and we had disabled it prematurely anyway.
2008-05-07GEM: Make dri_emit_reloc take GEM domain flags instead of TTM flags.Eric Anholt
The GEM flags are much more descriptive for what we need. Since this makes bufmgr_fake rather device-specific, move it to the intel common directory. We've wanted to do device-specific stuff to it before.
2008-05-06i965: fix googleearth in classic mode.Dave Airlie
In classic mode googleearth triggered a case where vbos weren't getting accounted properly.
2008-05-05i965: Don't cast the result of brw_prepare_vertices to an unsigned value.Xiang, Haihao
Negative value means other errors, not aperture overflow. fix bug #15752
2008-05-02Add intel_bufmgr_gem for new graphics execution manager.Eric Anholt
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