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path: root/src/mesa/drivers/dri/i965
AgeCommit message (Expand)Author
2009-09-02i965: CS FENCE in URB_FENCE is 11-bits wideXiang, Haihao
2009-09-02i965: validate sf stateXiang, Haihao
2009-08-29i965: Fix segfault with ARB_oq CheckQuery when results are already fetched.Eric Anholt
2009-08-29i965: Support PROGRAM_ENV_PARAMs in brw_vs_emit.cEric Anholt
2009-08-28i965: Use VBOs in the VBO module on 965, now that we have ARB_map_buffer_range.Eric Anholt
2009-08-28i965: Implement ARB_oq CheckQuery in the intended way.Eric Anholt
2009-08-26i965: Increase assmebly shader program parameter limitsIan Romanick
2009-08-26ARB prog: Change handling of program parameter limitsIan Romanick
2009-08-26i965: init the tex_units_used fieldBrian Paul
2009-08-26i965: fix incorrect tex unit in emit_tex() and emit_txb()Brian Paul
2009-08-26i965: clean-up tex target switchesBrian Paul
2009-08-26i965: added texture unit sanity checkBrian Paul
2009-08-26i965: keep track of which texture units the fragment shader accessesBrian Paul
2009-08-26i965: clean up texture target switchesBrian Paul
2009-08-25i965: add some texture unit/target assertionsBrian Paul
2009-08-22i965: Implement frag prog DPH like DP4Ian Romanick
2009-08-19intel: Fix failure to commit -a --amend before last push.Eric Anholt
2009-08-19intel: Align cubemap texture height to its padding requirements.Eric Anholt
2009-08-15i965: disable bounds checking on arrays with stride 0Roland Scheidegger
2009-08-14i965: Add support for GL_ARB_seamless_cube_mapIan Romanick
2009-08-13i965: fix cube map on IGDNGXiang, Haihao
2009-08-12Merge branch 'new-frag-attribs'Brian Paul
2009-08-12i965: Make the cube mapping RCP use a writemask.Eric Anholt
2009-08-12i965: Allocate destination registers for GLSL TEX instructions contiguously.Eric Anholt
2009-08-12i965: drop dead scalar handling in GLSL.Eric Anholt
2009-08-12i965: Correct brw_wm_nr_args for WM_DELTAXY and WM_PIXELXY.Eric Anholt
2009-08-12i965: Drop GLSL ABS code, which is translated away in brw_wm_fp.Eric Anholt
2009-08-12i965: Drop code for emitting OPCODE_SUB, since brw_wm_fp.c makes it an ADD.Eric Anholt
2009-08-12i965: Store the dispatch width in the WM compile struct.Eric Anholt
2009-08-12i965: Handle scalar result swizzling in shared GLSL/non-GLSL code.Eric Anholt
2009-08-12i965: Flag ARL-using programs as requiring brw_wm_glsl.cEric Anholt
2009-08-12i965: Remove some unused WM opcode args.Eric Anholt
2009-08-12i965: Avoid re-uploading the index buffer when we don't need to.Eric Anholt
2009-08-12vbo: Avoid extra validation of DrawElements.Eric Anholt
2009-08-12i965: Use _MaxElement instead of index-calculated min/max for VBO bounds.Eric Anholt
2009-08-07i965: Add a note justifying domain choice for the SF VP.Eric Anholt
2009-08-07i965: Replace the subroutine-skipping jump in VS with a NOP if it's a NOP.Eric Anholt
2009-08-07i965: minor context commentsBrian Paul
2009-08-05i965: Fix source depth reg setting for FSes reading and writing to depth.Eric Anholt
2009-08-04i965: Fix dangerous warning I let slip in.Eric Anholt
2009-08-04i965: Respect CondSwizzle in OPCODE_IF.Eric Anholt
2009-08-04i965: Emit conditional code updates as required for GLSL VS if statements.Eric Anholt
2009-08-04i965: Don't set pop_count in the reserved MBZ area of IF statements.Eric Anholt
2009-08-04i965: Print out ELSE and ENDIF src1 arguments like IF does.Eric Anholt
2009-08-04intel: Add support for EXT_provoking_vertex.Eric Anholt
2009-08-04i965: Spell "conditional" correctly.Eric Anholt
2009-08-04i965: Hook up the disassembler for INTEL_DEBUG={wm,vs}.Eric Anholt
2009-08-04i965: Initial import of disasm code from intel-gen4asm.Eric Anholt
2009-08-04i965: warning fixEric Anholt
2009-08-04i965: Fix RECT shadow sampling by not losing the other texcoords.Eric Anholt
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