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path: root/src/mesa/drivers/dri/i965
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2010-08-18i965: Don't set the swizzle on an immediate value in the VS.Eric Anholt
Fixes glsl-vs-if-nested (70.0 is not <= 70.000648 thanks to the swizzle bits getting set). Some safety checks are added to make sure this doesn't happen again as we increase the usage of immediate values in program generation.
2010-08-17i965: Throw a link error when we see a "return" in main().Eric Anholt
We'll need to use the HALT instruction to do this right, like returns from other functions.
2010-08-17i965: Add support for DP2 in the VS.Eric Anholt
Fixes glsl-vs-dot-vec2.
2010-08-16i965: Use the implied move available in most brw_wm_emit brw_math() calls.Eric Anholt
This saves an extra message reg move in the program, though I'm not clear on whether it will have any performance impact other than cache footprint. It will also fix those math calls on Sandybridge, where the brw_eu_emit.c brw_math() support relies on the implied move being used.
2010-08-16i965: Add disasm for Compr4 instruction compression.Eric Anholt
2010-08-13Merge branch 'master' into glsl2Ian Romanick
2010-08-13intel: Remove include of texmem.h, since we haven't used it in ages.Eric Anholt
2010-08-09i965: More s/stderr/stdout/ for program debug.Eric Anholt
2010-08-04i965: Settle on printing our program debug to stdout.Eric Anholt
Mixing stderr (_mesa_print_program, _mesa_print_instruction, _mesa_print_alu) with stdout means that when writing both to a file, there isn't a consistent ordering between the two.
2010-08-02Initialize a couple of HasIndex2 fields on Mesa IR src regs.Eric Anholt
2010-07-31mesa: Remove inclusion of compiler.h from mtypes.h.Vinson Lee
mtypes.h does not use any symbols from compiler.h. Also add the required headers for files that depended on symbols from compiler.h but were indirectly including compiler.h through mtypes.h.
2010-07-29intel: Declare the various tracked state variables using "extern"Kristian Høgsberg
2010-07-28ir_to_mesa: Respect the driver if it rejects a shader.Eric Anholt
2010-07-27intel: Remove unused intel/server filesKristian Høgsberg
2010-07-26Merge remote branch 'origin/master' into glsl2Eric Anholt
This pulls in multiple i965 driver fixes which will help ensure better testing coverage during development, and also gets past the conflicts of the src/mesa/shader -> src/mesa/program move. Conflicts: src/mesa/Makefile src/mesa/main/shaderapi.c src/mesa/main/shaderobj.h
2010-07-26i965: Fix reversed naming of the operations in compute-to-mrf optimization.Eric Anholt
Also fix up comments, so that the difference between the two passes is clarified.
2010-07-26i965: Clean up a few magic numbers to use brw_defines.h defs.Eric Anholt
2010-07-26i965: Use MIN2, MAX2 instead of rolling our own.Eric Anholt
2010-07-26i965: Fold the "is arithmetic" bit of 965 opcodes into the opcode list.Eric Anholt
2010-07-26i965: Remove some duped register size/count definitionsEric Anholt
2010-07-26i965: Move the GRF-to-MRF optimizations to brw_optimize.c.Eric Anholt
2010-07-26i965: Improve (i.e. remove) some grf-to-mrf unnecessary movesBenjamin Segovia
Several routines directly analyze the grf-to-mrf moves from the Gen binary code. When it is possible, the mov is removed and the message register is directly written in the arithmetic instruction Also redundant mrf-to-grf moves are removed (frequently for example, when sampling many textures with the same uv) Code was tested with piglit, warsow and nexuiz on an Ironlake machine. No regression was found there Note that the optimizations are *deactivated* on Gen4 and Gen6 since I did test them properly yet. No reason there are bugs but who knows The optimizations are currently done in branch free programs *only*. Considering branches is more complicated and there are actually two paths: one for branch free programs and one for programs with branches Also some other optimizations should be done during the emission itself but considering that some code is shader between vertex shaders (AOS) and pixel shaders (SOA) and that we may have branches or not, it is pretty hard to both factorize the code and have one good set of strategies
2010-07-26i965: Allow VS MOVs to use immediate constants.Eric Anholt
Clarifies program assembly, and with a little tweak to always use constant_map, we could cut down on constant buffer payload.
2010-07-23i965: Cleanly fail programs with unsupported array access.Eric Anholt
This should be more useful for developers and for bug triaging than just generating wrong code.
2010-07-23i965: Add support for VS relative addressing of temporary arrays.Eric Anholt
Fixes glsl-vs-arrays. Bug #27388.
2010-07-22i965: Respect VS/VP point size result when enabled.Eric Anholt
Fixes glsl-vs-point-size.
2010-07-22i965: Fix the disasm output for da16 src widths.Eric Anholt
This has confused me twice now. It's a fixed width of 4 (usually a region description of <4,4,1>), not 1. If it was 1, we'd have been skipping all over register space.
2010-07-22i965: Avoid extra MOV in VS indirect register reads.Eric Anholt
2010-07-22i965: Fix up VS temporary array access for fixed index offset != 0.Eric Anholt
2010-07-21i965: In the VS, multiply the address reg by the appropriate register size.Eric Anholt
The ARL value is increments of vec4 in the register file. But PROGRAM_TEMPORARY or PROGRAM_INPUT are stored as vec4s interleaved between the two verts being executed (thus a vec8 each), compared to PROGRAM_STATE_VAR being packed vec4s. Fixes: glsl-vs-arrays-2 glsl-vs-mov-after-deref (without regressing glsl-vs-arrays-3)
2010-07-21i965: Clean up brw_dp_READ_4_vs() now that it has fewer options to support.Eric Anholt
2010-07-21i965: Support relative addressed VS constant reads using the appropriate msg.Eric Anholt
The previous support was overly complicated by trying to use the same 1-OWORD message for both offsets.
2010-07-21i965: Fix the DP read msg_control definitions other than plain OWORD.Eric Anholt
2010-07-21i965: Clean up dead code from the VS get_constant/get_reladdr_constant split.Eric Anholt
2010-07-21i956: Set the execution size correctly for scratch space writes.Eric Anholt
Otherwise, the second half isn't written, and we end up reading back black. Fixes the remaining junk drawn in glsl-max-varyings, and will likely help with a number of large real-world shaders.
2010-07-21i965: Set the GEM domain flags for the scratch space.Eric Anholt
They go into the render cache, so while we don't care about their contents after execution, failing to note them could cause the writes to be flushed over important buffer contents later.
2010-07-21i965: Use the pretty define for 4-oword DP reads.Eric Anholt
2010-07-21i965: Set the send commit bit on register spills as required pre-gen6.Eric Anholt
Otherwise, the subsequent read may not get the written value.
2010-07-21i965: Add disasm for dataport reads (register unspilling).Eric Anholt
2010-07-21i965: Remove an unused variable.Carl Worth
To quiet a compiler warning.
2010-07-19i965: Mostly fix glsl-max-varyings.Eric Anholt
There was confusion on both the size of message we can send, and on what the URB destination offset means. The remaining problems appear to be due to spilling of regs in the fragment shader being broken.
2010-07-19i965: Clean up message register setup in emit_vertex_write().Eric Anholt
2010-07-19i965: Reduce repeated calculation of the attribute-offset-in-VUE.Eric Anholt
This cleans up some chipset dependency sprinkled around, and fixes a potential overflow of the attribute offset array for many vertex results.
2010-07-19i965: Clarify the nr_regs calculation in brw_clip.cEric Anholt
2010-07-19i965: Don't set up VUE space for the disabled user clip distances on gen6.Eric Anholt
2010-07-08i965: Add disasm for SEND mlen/rlen on Sandybridge.Eric Anholt
2010-07-08i965: Add 'wait' instruction supportZhenyu Wang
When EU executes 'wait' instruction, it stalls and sets notification register state. Host can issue MMIO write to clear notification register state to allow EU continue on executing again. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2010-07-08i965: Fix disasm of a SEND's mlen and rlen on Ironlake.Eric Anholt
2010-07-08i965: Add decode for Sandybridge DP write messages.Zhenyu Wang
2010-07-08i965: Add definitions for Sandybridge DP write/read messages.Zhenyu Wang