| Age | Commit message (Collapse) | Author |
|---|
|
Matches pre-gen6, and fixes glsl-vs-large-uniform-array.
|
|
|
|
Fixes piglit user-clip, and compiz desktop switching when dragging a
window and using just 2 desktops. Bug #30446.
|
|
|
|
This fixes some insanity that would otherwise be required for GLSL
1.30 bit ops or gen6 integer uniform operations in general, at the
cost of upload-time pain. Given that we only have that pain because
mesa's mangling our integer uniforms to be floats, this something that
should be fixed outside of the shader codegen.
|
|
The assumption is that all stages are the same program or that
varyings are passed between stages using built-in varyings.
|
|
Avoids GPU hang on glsl-fs-convolution-1.
|
|
I'm trying to clamp to a minimum of 1 URB row, not a maximum of 1.
Fixes:
glsl-kwin-blur
glsl-max-varying
glsl-routing
|
|
|
|
Fixes glsl-fs-uniform-array-5.
|
|
This was slightly confused because gen6_wm_constants does the push
constant buffer, while brw_wm_constants does pull constants.
|
|
|
|
|
|
It's a little more painful than before because we don't have the handy
mask register any more, and have to make do with cooking up a value
out of the flag register.
|
|
|
|
This doesn't appear to help any testcases I'm looking at, but it looks
like it's required.
|
|
This is apparently required, as the thread will be initiated while it
still has dependencies, and this is what waits for those to be
resolved before writing color.
|
|
|
|
|
|
Fixes glsl-fs-uniform-array-5, but not 6 which fails in ir_to_mesa.
|
|
This makes it a lot easier to track down where we failed when some
code emit triggers an assert. Plus, less memory allocation for
codegen.
|
|
Fixes glsl-fs-convolution-2, which was blowing up due to the array
access insanity getting at the uniform values within the loop. Each
temporary was considered live across the whole loop.
|
|
One, it was allocating increments of 1kb, but per thread scratch space
is a power of two. Two, the new FS wasn't getting total_scratch set
at all, so everyone thought they had 1kb and writes beyond 1kb would
go stomping on a neighbor thread.
With this plus the previous register spilling for the new FS,
glsl-fs-convolution-1 passes.
|
|
g0 is used by others, and is expected to be left exactly as it was
dispatched to us. So manually move g0 into our message reg when
spilling/unspilling and update the offset in the MRF. Fixes failures
in texture sampling after having spilled a register.
|
|
It can be tested with if (0) replaced with if (1) to force spilling for all
virtual GRFs. Some simple tests work, but large texturing tests fail.
|
|
It's amazing this code worked. Basically, we would get lucky in
register allocation and the tests using frontfacing would happen to
allocate gl_FrontFacing storage and the instructions generating
gl_FrontFacing but pointing at another register to the same hardware
register. Noticed during register spilling debug, when suddenly they
didn't get allocatd the same storage.
|
|
|
|
"Everyone else" does it this way, so follow suit. It's fewer
instructions, anyway.
|
|
I don't think this should matter, but I'm not sure, and it's
recommended by a kernel checker in fulsim.
|
|
|
|
This should reduce the cost of generating shadow maps, for example.
No performance difference measured in nexuiz, though it does trigger
this path.
|
|
These were for debugging in bringup. Now that relatively complicated
apps are working, they haven't helped debug anything in quite a while.
|
|
This fixes hangs in some Z-writes-in-shaders tests, though other
pieces don't come out correctly.
Bug #30392: hang in fbo-fblit-d24s8. (still fails with bad color drawn
to some targets)
|
|
|
|
|
|
|
|
XOR makes much more sense. Note that the previous code would have
failed for not(not(x)), but that gets optimized out.
|
|
|
|
Otherwise, it would try to handle arrays as structures, use
uninitialized memory, and crash.
|
|
We often use reg_null as the destination when setting up the flag
regs. However, on gen6 there aren't general implicit conversions to
destination types from src types, so the comparison to produce the
flag regs would be done on the integer result interpreted as a float.
Hilarity ensued.
Fixes 20 piglit cases.
|
|
|
|
Previously _LinkedShaders was a compact array of the linked shaders
for each shader stage. Now it is arranged such that each slot,
indexed by the MESA_SHADER_* defines, refers to a specific shader
stage. As a result, some slots will be NULL. This makes things a
little more complex in the linker, but it simplifies things in other
places.
As a side effect _NumLinkedShaders is removed.
NOTE: This may be a candidate for the 7.9 branch. If there are other
patches that get backported to 7.9 that use _LinkedShader, this patch
should be cherry picked also.
|
|
I broke it in 06fd639c519214b6ebcbf29127b6d9ed429f8641 by only testing
2 generations of hardware :(
|
|
|
|
Hopefully this code can just go away soon.
|
|
It is now to the point where we have no regressing piglit tests. It
also fixes Yo Frankie! and Humus DynamicBranching, probably due to the
piglit bias tests that work that didn't on the Mesa IR backend.
As a downside, performance takes about a 5-10% performance hit at the
moment (e.g. nexuiz 19.8fps -> 18.8fps), which I plan to resolve by
reintroducing 16-wide fragment shaders where possible. It is a win,
though, for fragment shaders using flow control.
|
|
Simply using RNDU, RNDZ, or RNDE does not produce the desired result.
Rather, the RND* instructions place a value in the destination register
that may be 1 less than the correct answer. They can also set per-channel
"increment bits" in a flag register, which, if set, mean dest needs to
be incremented by 1. A second instruction - a predicated add -
completes the job.
Notably, RNDD always produces the correct answer in a single
instruction.
Fixes piglit test glsl-fs-trunc.
|
|
The existing code used RNDD, which rounds down, rather than toward zero.
|
|
Fixes piglit test glsl-fs-ceil.
|
|
This cuts usually 2 out of 3 instructions for flag reg generation (if
statements, conditional assignment) by producing the conditional mod
in the expression representing the boolean value.
Fixes glsl-fs-vec4-indexing-temp-dst-in-nested-loop-combined (register
allocation no longer fails for the conditional generation
proliferation)
|
