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path: root/src/mesa/drivers/dri/i965
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2010-01-30i965: Remove unnecessary headers.Vinson Lee
2010-01-26intel: Clean up stale comments about cliprects.Eric Anholt
2010-01-26i965: Remove DRI1 leftovers from stipple offset handling.Eric Anholt
2010-01-26i965: Add support for EXT_draw_buffers2.Eric Anholt
2010-01-26i965: Fix fp fragment.position handling and enable HW part of ARB_fcc.Eric Anholt
As with swrast, this fixes the default pixel center behavior which was broken, and implements the previous behavior for integer. Fixes piglit fp-arb-fragment-coord-conventions-none. The extension won't be exposed until we get the GLSL part implemented. The DRI1 origin_x/y parts are dropped since they're no longer relevant.
2010-01-25i965: Remove unnecessary malloc/free in VS binding table setup.Eric Anholt
2010-01-25i965: Fix build after merge of mesa stable branch.Eric Anholt
2010-01-25Merge branch 'mesa_7_7_branch'Brian Paul
Conflicts: src/mesa/drivers/dri/intel/intel_screen.c src/mesa/drivers/dri/intel/intel_swapbuffers.c src/mesa/drivers/dri/r300/r300_emit.c src/mesa/drivers/dri/r300/r300_ioctl.c src/mesa/drivers/dri/r300/r300_tex.c src/mesa/drivers/dri/r300/r300_texstate.c
2010-01-22i965: Remove unnecessary headers.Vinson Lee
2010-01-23i965: add support for ARB_half_float_vertexDave Airlie
enables the extension on i965 and adds support to the draw upload for the vertex format. Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-01-21dri: Remove unnecessary glapi headers.Chia-I Wu
They are not used at all.
2010-01-19intel: Remove dead note_fence vtbl hook.Eric Anholt
2010-01-19i965: Improve the hashing of brw_state_cache keys to include the cache_id.Eric Anholt
No measurable difference on cairoperf.
2010-01-19i965: Remove obsolete comment about the state atoms.Eric Anholt
2010-01-19i965: Upload as many VS constants as possible through the push constants.Eric Anholt
The pull constants require sending out to an overworked shared unit and waiting for a response, while push constants are nicely loaded in for us at thread dispatch time. By putting things we access in every VS invocation there, ETQW performance improved by 2.5% +/- 1.6% (n=6).
2010-01-19i965: Allow for variable-sized auxdata in the state cache.Eric Anholt
Everything has been constant-sized until now, but constant buffer handling changes will make us want some additional variable sized array.
2010-01-18i965: Clean up constbuf handling by splitting reladdr/non-reladdr loads.Eric Anholt
The codepaths in the function were almost entirely different.
2010-01-18i965: Only set up the stack register if it's going to get used.Eric Anholt
2010-01-18i965: Fix loads of non-relative-addr constants after a reladdr load.Eric Anholt
Fixes piglit vp-arl-constant-array-huge-overwritten.
2010-01-08Merge branch 'mesa_7_7_branch'Brian Paul
Conflicts: src/mesa/drivers/dri/i965/brw_wm_emit.c
2010-01-07intel: Remove leftover symlinks from DRI1 removal.Eric Anholt
2010-01-06i965: fix invalid assertion in emit_xpd(), againBrian Paul
2010-01-05i965: fix invalid assertion in emit_xpd()Brian Paul
Invalid assertion found by Roel Kluin <roel.kluin@gmail.com>
2010-01-05i965: Fix build after blind merge of mesa 7.7 by Brian.Eric Anholt
2010-01-05Merge branch 'remove-intel-dri1'Kristian Høgsberg
* remove-intel-dri1: intel: intelScreenContext() is no longer used intel: Remove remaining dri2.enabled tests intel: Drop more cliprect bookkeeping intel: Remove struct intel_framebuffer intel: Remove client-side vblank code intel: Drop intelWindowMoved() intel: Drop batchbuffer cliprect_mode tracking intel: Drop DRI1 static regions intel: Use depth buffer from ctx.DrawBuffer in copypix_src_region() intel: Drop LOCK/UNLOCK_HARDWARE() intel: Drop DRI1 SwapBuffer implementation intel: Drop DRI1 CopySubBuffer implementation intel: Drop DRI1 support Push __driDriverExtensions out of dri_util.c and into the drivers Remove leftover __DRI{screen,drawable,context}Private references Check for libdrm_$chipset.pc when needed
2010-01-04mesa: make texture BorderColor a union of float/int/uintBrian Paul
When we have integer-valued texture formats, the texture border color must also store integer and uint values. With GL 3.0, the new glTexParameterIiv() and glTexParameterIuiv() functions can set the border color to int or uint values.
2010-01-04Merge branch 'mesa_7_7_branch'Brian Paul
Conflicts: docs/relnotes.html src/gallium/drivers/llvmpipe/lp_tex_sample_c.c src/gallium/drivers/r300/r300_cs.h src/mesa/drivers/dri/i965/brw_wm_surface_state.c src/mesa/main/enums.c
2010-01-04i965: Fix the surface offset calculation for tiled buffers.Eric Anholt
If we ever had a non-tile-aligned tiled renderbuffer, the math was all off. Use the existing x,y coordinates instead of trying to reconstruct them from an incorrectly-calculated offset value.
2010-01-04intel: Drop more cliprect bookkeepingKristian Høgsberg
2010-01-04intel: Remove client-side vblank codeKristian Høgsberg
2010-01-04intel: Drop batchbuffer cliprect_mode trackingKristian Høgsberg
2010-01-04intel: Drop LOCK/UNLOCK_HARDWARE()Kristian Høgsberg
2010-01-04Remove leftover __DRI{screen,drawable,context}Private referencesKristian Høgsberg
As part of the DRI driver interface rewrite I merged __DRIscreenPrivate and __DRIscreen, and likewise for __DRIdrawablePrivate and __DRIcontextPrivate. I left typedefs in place though, to avoid renaming all the *Private use internal to the driver. That was probably a mistake, and it turns out a one-line find+sed combo can do the mass rename. Better late than never.
2010-01-04Check for libdrm_$chipset.pc when neededKristian Høgsberg
This adds missing pkg-config lookup for intel and moves the radeon lookup into a case...esac so it's only looked up when one or more of the radeon drivers are enabled.
2009-12-31Merge branch 'mesa_7_7_branch'Brian Paul
Conflicts: configs/darwin src/gallium/auxiliary/util/u_clear.h src/gallium/state_trackers/xorg/xorg_exa_tgsi.c src/mesa/drivers/dri/i965/brw_draw_upload.c
2009-12-29mesa: implement per-buffer color maskingBrian Paul
This is part of the GL_EXT_draw_buffers2 extension and part of GL 3.0. The ctx->Color.ColorMask field is now a 2-D array. Until drivers are modified to support per-buffer color masking, they can just look at the 0th color mask. The new _mesa_ColorMaskIndexed() function will be called by glColorMaskIndexedEXT() or glColorMaski().
2009-12-28intel: Silence compiler warnings.Vinson Lee
2009-12-27Merge branch 'mesa_7_6_branch' into mesa_7_7_branchBrian Paul
Conflicts: src/gallium/auxiliary/util/u_network.c src/gallium/auxiliary/util/u_network.h src/gallium/drivers/i915/i915_state.c src/gallium/drivers/trace/tr_rbug.c src/gallium/state_trackers/vega/bezier.c src/gallium/state_trackers/vega/vg_context.c src/gallium/state_trackers/xorg/xorg_crtc.c src/gallium/state_trackers/xorg/xorg_driver.c src/gallium/winsys/xlib/xlib_brw_context.c src/mesa/main/mtypes.h
2009-12-26i965: Extra asserts on flow control instructions to clarify for clang.Eric Anholt
2009-12-26i965: Clean up double initialization of dst_flags from a rebase resolve.Eric Anholt
Caught by clang.
2009-12-26i965: Fix setup of immediate types for gen4 disasm.Eric Anholt
Caught by clang.
2009-12-24i965: Fix assert.Vinson Lee
2009-12-24i965: Add missing va_end.Vinson Lee
2009-12-22intel: Replace IS_965 checks with context structure usage.Eric Anholt
Saves another 600 bytes or so of code.
2009-12-22intel: Replace IS_G4X() across the driver with context structure usage.Eric Anholt
Saves ~2KB of code.
2009-12-22intel: Replace IS_IGDNG checks with intel->is_ironlake or needs_ff_sync.Eric Anholt
Saves ~480 bytes of code.
2009-12-21Merge branch 'mesa_7_7_branch'Brian Paul
Conflicts: src/mesa/main/version.h src/mesa/state_tracker/st_atom_shader.c
2009-12-11Merge branch 'mesa_7_7_branch'Brian Paul
Conflicts: src/gallium/state_trackers/xorg/xorg_xv.c src/mesa/drivers/dri/intel/intel_span.c
2009-12-10intel: Remove ARGB internal_format == GL_RGB hacksIan Romanick
Now that XRGB is supported, we don't need to hack around cases of an RGBA format buffer with an internal format of GL_RGB.
2009-12-10i965: Fix handling of drawing to MESA_FORMAT_XRGB8888Ian Romanick
It turns out that 965 and friends cannot actually render to an xRGB surfaces. Instead, the surface has to be RGBA with writes to alpha disabled and the blend function modified to always use 1.0 for destination alpha.
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