Age | Commit message (Collapse) | Author |
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Shrinks size of key to 8 bytes from 12.
Note that progs/demos/spriteblast.c is still broken.
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GLushort is big enough for the swizzle and origin fields.
The key could probably be made smaller still by re-ordering things.
I'll hold off on that until after the outputswritten64 branch is merged.
The key will get a little larger again with the GLbitfield64 fields.
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If the fragment shader doesn't use FRAG_ATTRIB_WPOS (gl_FragCoord) we
don't need to worry about the window size and origin in
brw_wm_populate_key().
This avoids re-generating the i965 shader code when a window is resized.
Issue spotted by Keith Whitwell.
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i965 might support more than 4 color draw buffers. But if not, this protects
from breakage if the Mesa limit is raised.
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Put the state that we care about in the hash key.
Issue spotted by Keith Whitwell.
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This makes things a bit easier to remember/understand.
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This gets us expected behavior for clamping between mipmap levels, and
avoids relayout of textures for doing clamping.
Fixes piglit lodclamp-between.
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If a backwards glDepthRange was supplied (as with the old Quake no-z-clearing
hack), the hardware would have always clamped because we weren't clamping to
the min of near/far and the max of near/far. Also, we shouldn't be clamping
to near/far at all when not in depth clamp mode (this usually didn't matter
since near/far are usually the same as the 0.0, 1.0 clamping you do for
fixed-point depth).
This should fix funny depth issues in PlaneShift, and fixes piglit
depth-clamp-range
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Conflicts:
src/mesa/drivers/dri/radeon/radeon_fbo.c
src/mesa/drivers/dri/s3v/s3v_tex.c
src/mesa/drivers/dri/s3v/s3v_xmesa.c
src/mesa/drivers/dri/trident/trident_context.c
src/mesa/main/debug.c
src/mesa/main/mipmap.c
src/mesa/main/texformat.c
src/mesa/main/texgetimage.c
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This reverts commit 8810b8f67135185d1044746bb861fe2ff997626c.
It turns out the i965 driver uses the intel->Fallback field as a boolean,
not as a bitmask. The intelFallback() function is a no-op in the i965
driver. It would have been nice if there were some comments about this.
I'll fix that next...
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Conflicts:
src/mesa/drivers/dri/intel/intel_fbo.c
src/mesa/drivers/dri/intel/intel_mipmap_tree.c
src/mesa/drivers/dri/intel/intel_mipmap_tree.h
src/mesa/drivers/dri/intel/intel_tex_copy.c
src/mesa/drivers/dri/intel/intel_tex_image.c
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By just using offsets, we confused the hardware's tiling calculations,
resulting in failures in miptree validation and blit clears.
Fixes piglit fbo-clearmipmap.
Bug #23552. (automatic mipmap generation)
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Setting intel->Fallback = 1 clobbered any fallback state that was already
set. Not sure where this hack originated (the git history is a little
convoluted). Define and use a new BRW_FALLBACK_DRAW bit instead. This
shouldn't break anything and could potentially fix some bugs (but no
specific ones are known).
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The value was probably wrong too.
It was the same as INTEL_FALLBACK_DRAW_BUFFER.
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Driver Makefiles can still add symlink dependencies/rules if needed.
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Again, last valid address, not first invalid address. Fixes regression
in 255e5be265133280293bbfd8b2f9b74b2dec50bb that the kernel now catches
and caused piglit draw_elements_base_vertex to fail.
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It's the address of the last valid byte, not the address of the first
invalid byte.
This should also fix problems with rendering with the new sanity checks in
the kernel.
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This appears to shave about 3% off the CPU usage in cairo-gl for firefox.
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And remove other unneeded #includes while we're at it.
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Now gl_texture_image::TexFormat is a simple MESA_FORMAT_x enum.
ctx->Driver.ChooseTexture format also returns a MESA_FORMAT_x.
gl_texture_format will go away next.
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Once we've freed a miptree, we won't see any more state cache requests
that would hit the things that pointed at it until we've let the miptree
get released back into the BO cache to be reused. By leaving those
surface state and binding table pointers that pointed at it around, we
would end up with up to (500 * texture size) in memory uselessly consumed
by the state cache.
Bug #20057
Bug #23530
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Conflicts:
src/mesa/drivers/dri/intel/intel_clear.c
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Its flagging of extra state that's already flagged by the vtbl new_batch
when appropriate was confusing my tracking down of the OA clear bug.
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Conflicts:
src/mesa/vbo/vbo_exec_array.c
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This is similar to what r300 does inside the driver, but I've added it as
a generic option since it seems most hardware will want it.
Fixes piglit nv-init-zero-reg.vpfp and nv-init-zero-addr.vpfp.
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Previously, it was trying to mess around with the varying's
WM setup data to produce a result. Along with not actually working when
passed a varying, this wouldn't work if you did dFd[xy]() on a temporary.
Instead, just calculate the derivative using the neighbors in the subspan.
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Passes piglit glsl-vs-loop testcase.
Bug #20171
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This was a regression in 0f328c90dbc893e15005f2ab441d309c1c176245.
Bug #23688
Bug #23254
(cherry picked from commit 5604b27b9326ac542069a49ed9650c4b0d3e939a)
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This was a regression in 0f328c90dbc893e15005f2ab441d309c1c176245.
Bug #23688
Bug #23254
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Conflicts:
Makefile
configs/default
progs/glsl/Makefile
src/gallium/auxiliary/util/u_simple_shaders.c
src/gallium/state_trackers/glx/xlib/xm_api.c
src/mesa/drivers/dri/i965/brw_draw_upload.c
src/mesa/drivers/dri/i965/brw_vs_emit.c
src/mesa/drivers/dri/intel/intel_context.h
src/mesa/drivers/dri/intel/intel_pixel.c
src/mesa/drivers/dri/intel/intel_pixel_read.c
src/mesa/main/texenvprogram.c
src/mesa/main/version.h
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On the 965, we just drop the value into the primitive packet. On non-945,
we rely on the sw tnl code handling it.
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