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path: root/src/mesa/drivers/dri/intel/intel_regions.c
AgeCommit message (Collapse)Author
2008-05-02[intel] Fix build for GEM. TTM is now disabled, and fencing is gone.Eric Anholt
Fencing was used in two places: ensuring that we didn't get too many frames ahead of ourselves, and glFinish. glFinish will be satisfied by waiting on buffers like we would do for CPU access on them. The "don't get too far ahead" is now the responsibility of the execution manager (kernel).
2008-02-14Hook up i915 driver to new DRI2 infrastructure.Kristian Høgsberg
2008-02-05[965] Bug 14314: assertion failure with with !AIGLX and depth=24 visual.Eric Anholt
2008-02-04Replace usage of DRM_BO_FLAG_MEM_TT in intel_regions.c with local/cached.Eric Anholt
In addition to potentially binding when it was about to be mapped anyway, failure to use CACHED_MAPPED means eating a full wbinvd on validate. Thanks to airlied for catching this.
2008-02-01 [intel] use _mesa_copy_rect for upload compressed texture,Zou Nan hai
this fix bad texture issue in some games(UT and quake).
2008-01-22[intel] Clean up references to screen buffer metrics.Kristian Høgsberg
The screen wide info such as pitch and cpp are obsoleted by the FBO changes, so clean up the last few references to those, except for setting up the legacy screen regions.
2007-12-15[intel] Merge intel_buffer_objects to shared.Eric Anholt
965 gains fixed TTM typing of the buffer object buffers and unused PBO functions, and 915 gains buffer size == 0 fixes from 965.
2007-12-15[965] Use shared intel_regions.c.Eric Anholt
This adds (so far) unused PBO functions, and holding the lock while writing to regions (which may be shared static screen regions).
2007-12-14[intel] Remove useless intel_region_idle.Eric Anholt
The idling it was trying to ensure was covered by the intel_miptree_image_map()->intel_region_map() that immediately followed it.
2007-12-12[intel] Move bufmgr back to context instead of screen, fixing glthreads.Eric Anholt
Putting the bufmgr in the screen is not thread-safe since the emit_reloc changes. It also led to a significant performance hit from pthread usage for the attempted thread-safety (up to 12% of a cpu spent on refcounting protection in single-threaded 965). The motivation had been to allow multi-context bufmgr sharing in classic mode, but it wasn't worth the cost.
2007-11-16[intel] Add 965 support to shared intel_blit.cEric Anholt
This requires that regions grow a marker of whether they are tiled or not, because fence (surface) registers are ignored by the 965 2D engine.
2007-11-16[i915] Pass static region names in so debugging says more than "static region".Eric Anholt
2007-11-09[intel] Move over files that will be shared with 965-fbo work.Eric Anholt