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This ensures all batchbuffers have a same cliprect mode after calling
_intel_batchbuffer_flush even if there aren't invalid commands in the
current batch buffer. (fix bug#18362).
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The mobile and desktop chipsets are the same, and having them separate is
more typing and more chances to screw up.
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GL_COLOR_INDEX mode is just like other normal formats (that is, not
depth/stencil) and is uploaded fine by TexImage.
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This avoids issues with dereferencing stale cliprects around intel_draw_buffer
time. Additionally, take advantage of cliprects staying constant for FBOs and
DRI2, and emit cliprects in the batchbuffer instead of having to flush batch
each time they change.
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Previously, we were trying to pass a name to the GEM GET_TILING_IOCTL,
which needs a handle, and failing. None of our buffers were tiled yet, but
they will be at some point with DRI2 and UXA.
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(thanks Eric).
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Use _mesa_copy_rect instead of BLT operation if dri_bufmgr_check_aperture_space
still fails after flushing batchbuffer. Partial fix for #17964.
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This is nasty because there's no way in GL to output data to the stencil
buffer directly, so we have to do a dance to wrap the depth/stencil buffer
in an ARGB renderbuffer.
Improves performance of several oglconform testcases by better than a factor
of 2.
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The fallback was introduced to fix bug #16697, but made the test it was
fixing run excessively long.
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This lets us short-circuit when we're leaving the same cliprects in place,
which becomes quite common with metaops clears, and may be useful for some of
our FBO paths.
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Move GL_ARB_texture_non_power_of_two and GL_ATI_separate_stencil
from the generic extension list to the 965-specific list. Neither
extension is supported on i830-class hardware, and
GL_ATI_separate_stencil is not supported on i915-class hardare.
GL_ARB_texture_non_power_of_two is supported on i915-class hardare and
is already in the i915-specific list.
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The ARB extension is a superset of the older SGIX extension. Any
hardware that can support the SGIX version can also support the ARB
version. In Mesa, any driver that supports one also supports the
other. This unification just simplifies some bits of code.
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- Sort extensions by ARB, then EXT, then vendor by name
- Remove redundant (only one of GL_{ARB,EXT,NV}_texture_rectangle) or
duplicate extension strings
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Broken by 0adfd1021035e90995a25ec5f20b736e55075d92, showed up as an assertion
failure in a software fallback in the shadowtex demo when we failed to
recognize the texture format.
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Improves performance of some oglconform regression tests 9x.
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Fixes a failure in pixel-pos.c oglconform test.
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Brought over from gallium-0.2 branch.
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Makefile.template
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Caused server crashes on second context creation since
7e0bbdcf033981282978554c2e68ce48b55aa291.
Bug #17600.
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Otherwise, we would use the pitch as width of the texture, and compiz would
render the pitch padding on the right hand side.
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Mesa requires that we be able to share objects between contexts, which means
that the objects need to be created by the same bufmgr, and the bufmgr
internally requires pthread protection for thread safety.
Rely on the bufmgr having appropriate locking.
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This interface has to be re-written to not be dumb and to work
for multiple apps.
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(Reverts a change to work around the problem on 965).
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This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
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This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03.
Conflicts:
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
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Previously, the updated images would be ignored because the miptree in the
image matched the miptree in the object, even though Mesa core had just attached
updated contents in ->Data. Additionally, Mesa core could have tried to
free inside our miptree if it had already been validated.
Fixes bug #17077.
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(bug #16852, #16853)
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Conflicts:
src/mesa/drivers/dri/intel/intel_span.c
src/mesa/main/fbobject.c
This converts the i915 driver to use the GEM interfaces for object management.
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To do this, I had to clean up some of 965 state upload stuff. We may end
up over-emitting state in the aperture overflow case, but that should be rare,
and I'd rather have the simplification of state management.
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