Age | Commit message (Collapse) | Author |
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buffer is used for a relocatee in the former relocation process
then another target buffer is used for this relocatee at the same
offset in the current relocation process.
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The screen wide info such as pitch and cpp are obsoleted by the FBO
changes, so clean up the last few references to those, except for
setting up the legacy screen regions.
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Around 10% of a CPU was being wasted to create the linked list which we
threw out immediately after passing it to the kernel.
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The fix for pageflipping with cliprects ended up causing a batch flush at
an inopportune time, which is fixed by moving it up.
Additionally, the recovery code for handling batch wraps at bad times is
replaced by just checking for the space up front, and using a no_batch_wrap
assert like on 965 to make sure that we weren't wrong about how much space that
was.
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Workaround for recursive batchbuffer flushing: If the window is
moved, we can get into a case where we try to flush during a
flush. What happens is that when we try to grab the lock for
the first flush, we detect that the window moved which then
causes another flush (from the intel_draw_buffer() call in
intelUpdatePageFlipping()). To work around this we reset the
batchbuffer tail pointer before trying to get the lock. This
prevent the nested buffer flush, but a better fix would be to
avoid that in the first place.
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Good for a 10-15% improvement to OA.
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Increases OA performance by about 3%.
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The previous code would reference freed memory on window moves.
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The previous change gave us only two modes, one which looped over the batch
per cliprect (3d drawing) and one that didn't (state updeast).
However, we really want 4:
- Batch doesn't care about cliprects (state updates)
- Batch needs DRAWING_RECTANGLE looping per cliprect (3d drawing)
- Batch needs to be executed just once (region fills, copies, etc.)
- Batch already includes cliprect handling, and must be flushed by unlock time
(copybuffers, clears).
All callers should now be fixed to use one of these states for any batchbuffer
emits. Thanks to Keith Whitwell for pointing out the failure.
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Drop a bunch of unused arguments from intel_create_renderbuffer() and
introduce intel_renderbuffer_set_region() to set the region for
a renderbuffer.
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This may allow better concurrency (noop in openarena performance now), but is
also important for the previous commit -- otherwise, we may end up with
BufferData, draw_prims, BufferData and the draw_prims would use the new VBO
data instead of old. This could still occur with user-supplied VBOs and poor
use of MapBuffer without BufferData.
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Both drivers have ended up relying on lost_hardware being called after each
batch buffer, so update the name. This removes one of the calls on 965 whic
h was outside of the batchbuffer handling code and just duplicating what had
already happened through batchbuffer handling.
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In particular, batch buffers are no longer flushed when switching from
CLIPRECTS to NO_CLIPRECTS or vice versa, and 965 just uses DRM cliprect
handling for primitives instead of trying to sneak in its own to avoid the
DRM stuff. The disadvantage is that we will re-execute state updates per
cliprect, but the advantage is that we will be able to accumulate larger
batch buffers, which were proving to be a major overhead.
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Each array element is now a BUFFER_x token rather than a BUFFER_BIT_x bitmask.
The number of active color buffers is specified by _NumColorDrawBuffers.
This builds on the previous DrawBuffer changes and will help with drivers
implementing GL_ARB_draw_buffers.
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These fields are no longer indexed by shader output. Now, we just have
a simple array of renderbuffer pointers.
If the shader writes to gl_FragData[i], send those colors to the N
_ColorDrawBuffers. Otherwise, replicate the single gl_FragColor (or
the fixed-function color) to the N _ColorDrawBuffers.
A few more changes and simplifications can follow from this...
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By avoiding the repeated relocation buffer creation/map/unmap/destroy for each
new batch buffer, this improves OpenArena framerates by 30%. Caching batch
buffers themselves doesn't appear to be a significant performance win over
this change.
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We have two consumers of relocations. One is static state buffers, which
want the same relocation every time. The other is the batchbuffer, which gets
thrown out immediately after submit. This lets us reduce repeated computation
for static state buffers, and clean up the code by moving relocations nearer
to where the state buffer is computed.
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This reverts commit 8bb9ae3693362a302206255c61f512d942df9bbf.
Validating our kernel buffers with the caching off in flags but on in mask
means that the kernel migrates the buffer to be uncached, which is undesired.
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The 'mask' value used in the validation operation specifies which of the
'flags' bits are being modified. Buffer validation wants to pass the memory
type and access mode (rwx) to the kernel so that the buffer will be placed
correctly, and so that the right kind of fence will be created (read vs
write). That means we actually want a constant mask for these operations,
and not something computed from the bits coming in. The constant we want is
DRM_BO_MASK_MEM | DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE | DRM_BO_FLAG_EXE.
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In order to optimize DrawPixels, the i915 texenv program isn't
applied to swrast DrawPixels in the i915 driver. This causes this
program isn't applied to any following swrast functions. Resetting
the swrast state fixes this issue. Fix #13614
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To do so, merge the remainnig necessary code from the buffers, blit, span, and
screen code to shared, and replace it with those.
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The core problem was that _mesa_generate_mipmap was not respecting RowStride
of the source image. Additionally, the intel private data associated with the
images (level and face) was not being initialized for the
_mesa_generate_mipmap-generated images.
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The 965 driver relies on flag checking instead of these hooks, and will be
using this code soon.
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Otherwise, we may violate cliprect asssertions on clearing the buffers, which
isn't affected by the fallback.
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The diffuse color format is always ARGB32, regardless of the destination
surface format.
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mipmap pitches must account for the device alignment requirements, which
used to be fairly simple; just align to a 4-byte boundary. However, to allow
textures to be drawn to under TTM, they now need to be aligned to a 64-byte
boundary. Placing all of the alignment constraints in a single function
allows this new constraint to be applied uniformly.
There was some pitch constraining code in intel_miptree_create, but that was
modifying the pitch long after the miptree had been layed out, so it only
served to wreck the mipmap and cause rendering errors.
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Don't dereference NULL renderbuffer pointer, and make sure the software
fallback sticks.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=13694 .
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