Age | Commit message (Collapse) | Author | |
---|---|---|---|
2009-09-09 | i965: fix an overlooked merge conflict | Brian Paul | |
2009-09-09 | Merge branch 'mesa_7_6_branch' | Brian Paul | |
2009-09-09 | Merge branch 'mesa_7_5_branch' into mesa_7_6_branch | Brian Paul | |
Conflicts: Makefile configs/default progs/glsl/Makefile src/gallium/auxiliary/util/u_simple_shaders.c src/gallium/state_trackers/glx/xlib/xm_api.c src/mesa/drivers/dri/i965/brw_draw_upload.c src/mesa/drivers/dri/i965/brw_vs_emit.c src/mesa/drivers/dri/intel/intel_context.h src/mesa/drivers/dri/intel/intel_pixel.c src/mesa/drivers/dri/intel/intel_pixel_read.c src/mesa/main/texenvprogram.c src/mesa/main/version.h | |||
2009-09-09 | intel: add B43 chipset support | Zhenyu Wang | |
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> | |||
2009-09-08 | intel: Add support for ARB_draw_elements_base_vertex. | Eric Anholt | |
On the 965, we just drop the value into the primitive packet. On non-945, we rely on the sw tnl code handling it. | |||
2009-09-08 | i965: Add support for ARB_depth_clamp. | Eric Anholt | |
2009-09-08 | Revert "intel: helper to debug bufmgr (disabled)" | Eric Anholt | |
This reverts commit e0ec405a9fa6fbc1cf2ac531ed5efd1a64e01f18. This is already available in INTEL_DEBUG=bufmgr in the environment. | |||
2009-09-08 | intel: #include clean-ups | Brian Paul | |
2009-09-08 | i965: use _mesa_is_bufferobj() | Brian Paul | |
Also, remove unneeded call to _mesa_validate_pbo_access(). It's done by core Mesa as the comment suggested. | |||
2009-09-08 | i965: use _mesa_is_bufferobj() | Brian Paul | |
2009-09-08 | i965: use _mesa_is_bufferobj() | Brian Paul | |
2009-09-04 | i965: Fix warnings in intel_pixel_read.c. | Eric Anholt | |
(cherry picked from commit c80ce5ac90b1e0ac7a72cd41c314aa2000bfecf5) | |||
2009-09-04 | intel: Also get the DRI2 front buffer when doing front buffer reading. | Eric Anholt | |
(cherry picked from commit df70d3049a396af3601d2a1747770635a74120bb) | |||
2009-09-04 | intel: Update Mesa state before span setup in glReadPixels. | Eric Anholt | |
We could have mapped the wrong set of draw buffers. Noticed while looking into a DRI2 glean ReadPixels issue. (cherry picked from commit afc981ee46791838f3cb83e11eb33938aa3efc83) | |||
2009-09-04 | intel: Move intel_pixel_read.c to shared for use with i965. | Eric Anholt | |
(cherry picked from commit dcfe0d66bfff9a55741aee298b7ffb051a48f0d3) | |||
2009-09-04 | intel: Align untiled region height to 2 according to 965 docs. | Eric Anholt | |
This may or may not be required pre-965, but it doesn't seem unlikely, and I'd rather be safe. (cherry picked from commit b053474378633249be0e9f24010650ffb816229a) | |||
2009-09-03 | mesa: rename gl_sync_object::Status to StatusFlag | Brian Paul | |
There's a symbol collision with X11/Xlib.h #define Status int in the Mesa xlib code. This seems the simpliest way to work around this. | |||
2009-09-03 | intel: Add support for ARB_sync. | Eric Anholt | |
We currently weasel out of supporting the timeout parameter, but otherwise this extension looks ready, and should make the common case happy. | |||
2009-09-03 | intel: helper to debug bufmgr (disabled) | Brian Paul | |
2009-09-03 | mesa: change ctx->Driver.BufferData() to return GLboolean for success/failure | Brian Paul | |
Return GL_FALSE if we failed to allocate the buffer. Then raise GL_OUT_OF_MEMORY in core Mesa. | |||
2009-09-02 | intel: Add support for FlushMappedBufferRange for ARB_map_buffer_range. | Eric Anholt | |
This should help for the usage by the VBO module, where we would upload the whole remaining chunk of the buffer for a series of range maps that should cover just a segment of it. | |||
2009-09-02 | intel: Sync a synchronized READ_BIT map buffer range with GL drawing to it. | Eric Anholt | |
It's probably uncommon, but would obviously have gone wrong. | |||
2009-09-02 | intel: Move MapBufferRange mesa state setting up to cover the 915 case. | Eric Anholt | |
2009-09-01 | intel: use _mesa_expand_bitmap() to skip an intermediate buffer | Brian Paul | |
2009-09-01 | intel: use BUFFER_BITS_COLOR | Brian Paul | |
2009-09-01 | intel: fix incorrect parameter type for intel_bufferobj_map_range() | Brian Paul | |
2009-09-01 | intel: set Length/Offset fields in intel_bufferobj_map() | Brian Paul | |
2009-09-01 | intel: use _mesa_meta_copy_pixels() when do_blit_copypixels() fails | Brian Paul | |
Also, trim down #includes. | |||
2009-09-01 | intel: trim down #includes | Brian Paul | |
2009-09-01 | intel: use _mesa_meta_draw_pixels() | Brian Paul | |
The textured quad path is slightly faster and will work with POT textures on i945. | |||
2009-09-01 | intel: trim down #includes | Brian Paul | |
2009-09-01 | intel: use _mesa_meta_clear(), it's a bit faster | Brian Paul | |
2009-08-31 | intel: clear buffer fields in intel_bufferobj_unmap() | Brian Paul | |
2009-08-30 | intel: use more efficient loop over buffers | Brian Paul | |
2009-08-28 | intel: Add support for GL_ARB_map_buffer_range. | Eric Anholt | |
Passes glean's bufferObject test, and should provide good performance in the cases applications are expected to use. | |||
2009-08-27 | intel: Add support for ARB_copy_buffer. | Eric Anholt | |
Passes glean's bufferObject test for this extension. | |||
2009-08-19 | intel: Align untiled region height to 2 according to 965 docs. | Eric Anholt | |
This may or may not be required pre-965, but it doesn't seem unlikely, and I'd rather be safe. | |||
2009-08-14 | i965: Add support for GL_ARB_seamless_cube_map | Ian Romanick | |
2009-08-14 | intel: in intel_context struct use typedef for sarea struct | Tobias Doerffel | |
Using drm_i915_sarea_t instead of struct drm_i915_sarea seems to be a common standard now, therefore fix it also in intel_context structure. Additionally this silences a compiler warning: intel_swapbuffers.c: In function `intelFixupVblank': intel_swapbuffers.c:48: warning: initialization from incompatible pointer type Signed-off-by: Tobias Doerffel <tobias.doerffel@gmail.com> | |||
2009-08-10 | intel: use new _mesa_meta_copy_pixels() function | Brian Paul | |
glCopyPixels() no longer hits a software fallback when zooming, blending, etc. | |||
2009-08-10 | intel: add missing \n to fprintf() | Brian Paul | |
2009-08-10 | intel: use new _mesa_meta_blit_framebuffer() function | Brian Paul | |
The previous version of framebuffer blit was a quick hack. The new meta version works pretty well. | |||
2009-08-07 | Revert "i965: Disable texture tiling by default." | Eric Anholt | |
This reverts commit b8e638d4895d2d342306bb6443a455f73903ce20. Now that the known hangs and misrendering issues are fixed, I'm ready to start encouraging it by default again. | |||
2009-08-07 | intel: Align region height as required for tiled regions. | Eric Anholt | |
Otherwise, we would address beyond the end of our buffers. Fixes reliable GPU segfault with texture_tiling=true and oglconform shadow.c. Bug #22406. | |||
2009-08-07 | intel: Add some more safety asserts in the blit code. | Eric Anholt | |
2009-08-07 | intel: minor context comments | Brian Paul | |
2009-08-07 | intel: move blit call out of assert() | Brian Paul | |
2009-08-07 | intel: fix typo: s/softare/software/ | Brian Paul | |
2009-08-05 | Merge branch 'mesa_7_5_branch' | Brian Paul | |
Conflicts: src/mesa/main/state.c | |||
2009-08-05 | intel: implement intelCompressedTexSubImage2D | Roland Scheidegger | |
similar to the radeon code. passes tests/texcompsub |