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path: root/src/mesa/drivers/dri/intel
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2010-03-05intel: Remove support for the DRI1 TFP extension.Eric Anholt
2010-03-05intel: Only do batchbuffer debug if --enable-debug is used.Eric Anholt
This saves 6.6KB on the 965 driver, and appears to speed firefox-talos-gfx up by 1-2%. Unlike many other asserts in the driver, when we make a mistake that would trigger one of these it generally shows up all the time for developers, so turning it off for release seems fine.
2010-03-05intel: Replace batch macro contents with function calls.Eric Anholt
This manages to cut down another 3800 bytes.
2010-03-05intel: Move the assertions about reloc delta from the macros to the function.Eric Anholt
Cuts another 1800 bytes from the driver.
2010-03-05intel: Check that the batch is mapped per BEGIN, not each OUT.Eric Anholt
Shaves 800 bytes off the driver.
2010-03-05Merge branch 'object-purgeable'Chris Wilson
Acked-by: Brian Paul <brianp@vmware.com>
2010-03-05APPLE_object_purgeable: intelChris Wilson
Implement support for purgeable objects by using the GEM madvise ioctl. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-03-04intel: Remove non-kernel-exec-fencing support.Eric Anholt
Shaves 60k off the driver from removing the broken spans code. This means we now require 2.6.29, which seems fair given that it's a year old and we've removed support for non-KMS already in the last release of 2D.
2010-03-04intel: Remove the unused s8 spans code. Not hit during no_rast piglit.Eric Anholt
Shaves 5.5k off of the driver.
2010-03-04i915: Enable texture tiling by default.Eric Anholt
This now passes piglit testcases, and shows performance improvements on openarena. Blit-heavy apps may see degradation, but the expectation is that the common case of 3D rendering will see significant wins. This regresses gen-teximage on my 855, and no piglit tests on my 945.
2010-03-03i915: Tell the kernel when we actually need fence registers on our BOs.Eric Anholt
This improves tiled texture performance of OA on my 945 from 25.3fps to 29.0fps, whereas untiled is 28.2fps, by avoiding stalls for fence register changes.
2010-03-03intel: Use drm_intel_bo_alloc_tiled for region allocs.Eric Anholt
This moves the logic for how to align pitches, heights, and sizes of objects to one central location. Fixes rendering with texture tiling on i915. Note that current libdrm is required for the change for I915_TILING_NONE pitch alignment.
2010-03-03i915: Don't do the pitch expansion for tiled buffers.Eric Anholt
The weirdness that led to the bumping of pitch for those 512/1024 pixels is that in taking a 2x2 subspan or bilinear filtering we'd end up hitting the same channel in 2 different pages, leading to lower performance. With tiling, that doesn't occur, so we don't need to waste the memory.
2010-03-03intel: Use GTT mapping in the blit fallback path in case there's tiling.Eric Anholt
2010-03-03intel: Set InternalFormat for renderbuffers created from an EGLImageKristian Høgsberg
2010-03-02intel: passs correct context type to intel_prepare_render() callBrian Paul
2010-02-26intel: Lookup requested renderbuffer in intel_create_image_from_renderbufferKristian Høgsberg
Previously we'd use the current renderbuffer.
2010-02-25intel: Fix up INTEL_NO_HW support.Eric Anholt
This was accidentally (it seems) deleted in 5203b7227ccb6b618fa42f08434d4a3cf123dca2
2010-02-25i965: Fix up some Sandybridge define checks for the structure rebase.Eric Anholt
2010-02-25i965: Untested Sandybridge SF setup.Eric Anholt
2010-02-25i965: Add basic decode of new gen6 packet boundaries.Eric Anholt
2010-02-25i965: Set up sandybridge depthbuffer.Eric Anholt
2010-02-25intel: Start adding defines and some bits for sandybridge bringup.Eric Anholt
2010-02-24intel: Implement GL_OES_EGL_image entrypointsKristian Høgsberg
2010-02-24intel: Implement DRI image extensionKristian Høgsberg
2010-02-23intel: Call intel_prepare_render() in intelMakeCurrent()Kristian Høgsberg
This restores old behaviour, where we end up doing a DRI2GetBuffers() call from intelMakeCurrent(). The idea was that we could do this lazily, just before we start rendering. However, if we don't do the DRI2GetBuffers() round-trip we don't get the drawable size and higher level mesa ends up short-cutting a number of GL calls, such as glClear().
2010-02-23i965: Enable GL_ARB_fragment_coord_conventions now that the GLSL is fixed.Eric Anholt
Tested with piglit glsl-arb-fragment-coord-conventions.
2010-02-22intel: assert that we do not overflow the batch buffer.Chris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-02-22intel: Check that we have a bufmgr or bail out when initializing the context.Chris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-02-20intel: Silence compiler format warnings.Vinson Lee
2010-02-19intel: Set buffer stamp before getting new buffersKristian Høgsberg
This way, if we get an invalidate as we update the buffers, we don't clobber the drawable stamp and ignore the invalidate. Pointed-out-by: Francisco Jerez
2010-02-19Replace the _mesa_*printf() wrappers with the plain libc versionsKristian Høgsberg
2010-02-19Replace _mesa_malloc, _mesa_calloc and _mesa_free with plain libc versionsKristian Høgsberg
2010-02-18intel: Include main/hash.h using "" instead of <>Kristian Høgsberg
2010-02-17intel: Implement the DRI2 invalidate function properlyKristian Høgsberg
This uses a stamp mechanisms to mark the DRI drawable as invalid. Instead of immediately updating the buffers we just bump the drawable stamp and call out to DRI2GetBuffers "later". "Later" used to be at LOCK_HARDWARE time, and this patch brings back callouts at the points where we used to call LOCK_HARDWARE. A new function, intel_prepare_render(), is called where we used to call LOCK_HARDWARE, and if the buffers are invalid, we call out to DRI2GetBuffers there. This lets us invalidate buffers only when notified instead of on every glViewport() call. If the loader calls the DRI invalidate entrypoint, we disable viewport triggered buffer invalidation. Additionally, we can clean up the old viewport mechanism a bit, since we can just invalidate the buffers and not worry about reentrancy and whatnot.
2010-02-16dri2: Event driven buffer validation.Francisco Jerez
When a buffer invalidation event is received from the X server, the "invalidate" hook of the DRI2 flush extension is executed: A generic implementation (dri2InvalidateDrawable) is provided that just bumps the "pStamp" sequence number in __DRIdrawableRec. For old servers not supporting buffer invalidation events, the invalidate hook will be called before flushing the fake front/back buffer (that's typically once per frame -- not a lot worse than the situation we were in before). No effort has been made on preserving backwards compatibility with version 2 of the flush extension, but I think it's acceptable because AFAIK no released stack is making use of it. Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
2010-02-12intel: Remove unused variable.Vinson Lee
2010-02-12intel: Avoid dri_bo_flink() in intel_update_renderbuffers()Kristian Høgsberg
Now that we track the global name in struct intel_region, we can just look it up there.
2010-02-12intel: Track named regions and make sure we only have one region per named boKristian Høgsberg
2010-02-11i915: Remove always-true irq_active struct intel_screen fieldKristian Høgsberg
2010-02-11i915: Remove a few DRI1 era struct intel_screen fieldsKristian Høgsberg
2010-02-11i915: Drop intelScreenPrivate typedef and just call it struct intel_screenKristian Høgsberg
2010-02-11i915: Remove unused intelRegion structKristian Høgsberg
Phew, sure is nice to only have one struct called intel region.
2010-02-11i915: Remove left-over drmUnmap()Kristian Høgsberg
2010-02-10intel: Don't expose GLX_SWAP_EXCHANGE_OMLIan Romanick
We can't always guarantee that the swap will happen by exchange, so we can't expose this mode. GLX_SWAP_UNDEFINED_OML already covers the case where the swap *might be* by exchange. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2010-02-10intel: Expose a minimal number of configs with accumulation bufferIan Romanick
Expose one config per color depth that includes accumulation buffer. We could probably expose only one config with accumulation buffer, but that would require figuring out the actual color depth. This is easier and only exposes 2 useless configs. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2010-02-10dri: Allow selective generation of accum. buffer configsIan Romanick
Modify the interface to driCreateConfigs allowing drivers to not expose configs with an accumuation buffer. All of the drivers calling function have been updated to pass true for the accumulation selector. This maintains the current behavior. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Kristian Høgsberg <krh@bitplanet.net> Reviewed-by: Corbin Simpson <MostAwesomeDude@gmail.com>
2010-02-10intel: Stop exposing useless 24 depth/0 stencil configsIan Romanick
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2010-02-10intel: Remove redundant init of depth_bits / stencil_bits in intelInitScreen2Ian Romanick
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2010-02-10intel: Update comment in intelInitScreen2 to noting DRI2 protocol issuesIan Romanick
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>