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path: root/src/mesa/drivers/dri/intel
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2009-03-05intel: Fix bpp setting of blits to 8bpp targets.Eric Anholt
This was causing hangs in cairogears, as we would blit to the 8bpp target (A8 texture) as 16bpp, and stomp over state objects.
2009-03-05i965: fix 3DPRIMITIVE batch decode of the vertex count field.Eric Anholt
2009-03-05intel: Add always_flush_batch driconf option for making small batchbuffers.Eric Anholt
This can improve debugging with INTEL_DEBUG=batch,sync by giving smaller batchbuffers.
2009-03-05intel: Add always_flush_cache driconf option for debugging cache flush failure.Eric Anholt
I keep wanting to hack this knob in as a one-time thing, so it seemed useful to have all the time.
2009-03-05i965: Add a note about why the _NEW_STENCIL is required in draw_buffers.Eric Anholt
2009-03-05intel: Remove a gratuitous MI_FLUSH after clearing with a blit.Eric Anholt
The 3D destination shares the same cache so we don't have any trouble with the later commands needing the writes flushed inside of the same batchbuffer.
2009-03-05i965: Remove dead flushing code.Eric Anholt
2009-03-05i965: fix screen depth test in intel_validate_framebuffer)_Brian Paul
front_region may be null.
2009-03-04i965: add software fallback for conformant 3D textures and GL_CLAMPRobert Ellison
The i965 hardware cannot do GL_CLAMP behavior on textures; an earlier commit forced a software fallback if strict conformance was required (i.e. the INTEL_STRICT_CONFORMANCE environment variable was set) and 2D textures were used, but it was somewhat flawed - it could trigger the software fallback even if 2D textures weren't enabled, as long as one texture unit was enabled. This fixes that, and adds software fallback for GL_CLAMP behavior with 1D and 3D textures. It also adds support for a particular setting of the INTEL_STRICT_CONFORMANCE environment variable, which forces software fallbacks to be taken *all* the time. This is helpful with debugging. The value is: export INTEL_STRICT_CONFORMANCE=2
2009-03-02mesa: use Stencil._Enabled field instead of Stencil.EnabledBrian Paul
2009-03-02mesa: remove unused AUX buffersBrian Paul
Remove all references to aux buffers 1..3. Keep AUX0 around for now just in case, but it'll probably go too someday. I don't know of any OpenGL drivers since the IRIX days that support aux color buffers.
2009-02-27intel: remove some unneeded buffer unmap callsBrian Paul
Core mesa now unmaps the buffers if needed in these cases.
2009-02-27i915: Add support for a new G33-like chipset.Shaohua Li
Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-02-26intel: no-op the intel_finish_render_texture() functionBrian Paul
It doesn't have to do anything. See comments for more details.
2009-02-26intel: check texture formats in intel_validate_framebuffer()Brian Paul
We can't render into any texture format; only certain formats. Check that render-to-texture's format is renderable in the intel_validate_framebuffer() There seems to be a bug somewhere that causes rendering to rgb565 textures to be corrupted so disallow that for now. This will be revisted.
2009-02-26intel: updated comment, some debug code (disabled)Brian Paul
2009-02-26i965: add missing init for region->widthBrian Paul
This doesn't seem to really effect anything but seeing width=0 in drawing regions was confusing.
2009-02-26intel: Revert disable of accelerated Bitmap, which slipped in with spans stuff.Eric Anholt
2009-02-26intel: Disable creating DRI2 FBconfigs with depth size != color size.Eric Anholt
While it's a nice idea to be able to allow clients to choose a smaller (or bigger for 16bpp screens!) depth size, right now DRI2 hands back a buffer with a size that matches the drawable, rather than being based off of the visual. This led to problems in readback as parts of the driver disagreed on what format the depth buffer was really in. Fixes the remainder of bug #19447.
2009-02-26intel: Add span code for z24 without stencil.Eric Anholt
It seems that in this case the Mesa code is handing us x8z24 values instead of z24s8 values, so we need to not do the rotation. Fixes half of OGLconform depthrange.c. Bug #19447.
2009-02-25intel: make template wrappers for the spans templates.Eric Anholt
This is insanity, but so is copying the same blocks containing the actual interesting code in the file three times each for the different tile formats.
2009-02-25intel: Fix up x8r8g8b8 renderbuffer format so that alpha=1 spans code happens.Eric Anholt
I was lured into a false sense of security by the fact that the spans code was already there, and a bunch of tests didn't catch the problem. oglconform's mask.c did, though. Bug #19970.
2009-02-21intel: Fix intelSetTexBuffer miptree leak.Kristian Høgsberg
The intelImage also holds a reference to the miptree, so unref that as well.
2009-02-21intel: tell libdrm whether we want a cpu-ready or gpu-ready BO for regions.Eric Anholt
This lets us avoid allocing new buffers for renderbuffers, finalized miptrees, and PBO-uploaded textures when there's an unreferenced but still active one cached, while also avoiding CPU waits for batchbuffers and CPU-uploaded textures. The size of BOs allocated for a desktop running current GL cairogears on i915 is cut in half with this. Note that this means we require libdrm 2.4.5.
2009-02-20intel: fix datatype typo, s/GLboolean/GLuint/Brian Paul
Fixes mysterious failures in glean glsl1 test.
2009-02-17intel: Fix tri clear to do FBO color attachments as well.Eric Anholt
This is a 2% win in fbo_firecube, and would avoid a sw fallback for masked clears.
2009-02-17intel: Clean up several 965 memory leaks on context destroy.Eric Anholt
2009-02-13intel: turn on GL_ARB_shading_language_120Brian Paul
It's done in the Mesa GLSL compiler. The only part of it that might matter in drivers is the centroid sampling option for MSAA.
2009-02-11Fix an i965 assertion failure on glClear()Robert Ellison
While running conform with render-to-texture: conform -d 33 -v 2 -t -direct the i965 driver failed this assertion: intel_clear.c:77: intel_clear_tris: Assertion `(mask & ~((1 << BUFFER_BACK_LEFT) | (1 << BUFFER_FRONT_LEFT) | (1 << BUFFER_DEPTH) | (1 << BUFFER_STENCIL))) == 0' failed. The problem is that intel_clear_tris() is called by intelClear() to clear any and all of the available color buffers, but intel_clear_tris() actually only handles the back left and front left color buffers; so the assertion fails as soon as you try to clear a non-standard color buffer. The fix is to have intelClear() only call intel_clear_tris() with buffers that intel_clear_tris() can support. intelClear() already backs down to _swrast_Clear() for all buffers that aren't handled explicitly.
2009-02-10intel: Add x8r8g8b8 visuals to DRI1 fbconfigs alongside a8r8gb8.Eric Anholt
This involved fixing driConcatConfigs to not return const (which had made a mess of a previous patch too).
2009-02-10intel: Don't do the extra MI_FLUSH in flushing except when doing glFlush().Eric Anholt
Everything other than "make sure the last rendering ends up visible on the screen" doesn't need that behavior.
2009-02-10intel: Speed up glDrawPixels(GL_ALPHA) by using an alpha texture format.Eric Anholt
2009-02-10intel: Fix some state leakage of {Client,}ActiveTexture in metaops.Eric Anholt
Found while debugging cairo-gl.
2009-02-10intel: don't crash when dri2 tells us about buffers we don't care about.Eric Anholt
2009-02-10Merge commit 'origin/gallium-master-merge'Brian Paul
This is the big merge of the gallium-0.2 branch into master. gallium-master-merge was just the staging area for it. Both gallium-0.2 and gallium-master-merge are considered closed now. Conflicts: progs/demos/Makefile src/mesa/main/state.c src/mesa/main/texenvprogram.c
2009-02-10intel: minor reformatting, commentsBrian Paul
2009-02-10gallium: Fixups for driCreateConfigs MSAA support.Michel Dänzer
Add the MSAA samples array or make sure its contents are initialized.
2009-02-09i965: need to disable current shader, if any, in intel_clear_tris()Brian Paul
Fixes bad background in all the progs/glsl/ tests.
2009-02-09re-add MSAA supportBrian Paul
(cherry picked from commit f7d80aa00611917bc8ce637136d982b151b8f44f) This also involved adding the new MSAA fields to driCreateConfigs(). Also, re-add prog_instructions->Sampler field for i965 driver. Will have to revisit that.
2009-02-04intel: Decode MI operands using specific length masksChris Wilson
The MI opcodes have different variable length masks, so use an operand specific mask to decode the length.
2009-02-04intel: Correct decoding of 3DSTATE_PIXEL_SHADER_CONSTANTSChris Wilson
A couple of minor typos that proclaimed an error in the wrong command, and failed to offset the mask.
2009-02-04intel: Fix fbo_firecube regression with FBconfigs change.Eric Anholt
By selecting a 4444 texture format due to a bad test, we hit the intel_update_wrapper error path, and despite the appearance of error handling in it and its callers, the desired behavior (software fallback) doesn't occur.
2009-02-03intel: Fix commented-out glViewport in intel_meta_set_passthrough_transform.Eric Anholt
Too much commit -a while debugging.
2009-02-02i965: Delete old metaops code now that there are no remaining consumers.Eric Anholt
2009-02-02intel: replace custom metaops clear with generic.Eric Anholt
No real-world impact on performance seen. Even glxgears seems to be, if anything, happier.
2009-01-31intel: Correct FBconfig color masks with DRI2. Fail at copy and paste.Eric Anholt
This still leaves us with a broken depth 32 visual, but now it's the server's visual setup that's at fault.
2009-01-30intel: more debug infoBrian Paul
2009-01-30intel: remove unused RenderToTexture fieldBrian Paul
2009-01-30intel: If we're doing a depth clear with tris, do color with it.Eric Anholt
This is a 10% win on the ever-important glxgears not-a-benchmark.
2009-01-30i915: Only call CalcViewport from DrawBuffers instead of Viewport.Eric Anholt
This saves an inadvertent round-trip to the X Server on DrawBuffers, which was hurting some metaops.