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path: root/src/mesa/drivers/dri/r300/compiler/r3xx_vertprog.c
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2010-10-18r300g: Add new debug option for logging vertex/fragment program statsTom Stellard
2010-09-29r300/compiler: Move declaration before code.Vinson Lee
Fixes this GCC warning on linux-x86 build. r3xx_vertprog.c: In function ‘ei_if’: r3xx_vertprog.c:396: warning: ISO C90 forbids mixed declarations and code
2010-09-05r300/compiler: fix the instruction limit in vertex shadersMarek Olšák
Broken with commit d774b0c710bb7d833d17bd12f5151a0176baad96. Reported by Chris Rankin.
2010-09-04r300/compiler: use limits from the compiler input instead of inline constantsMarek Olšák
2010-09-04r300/compiler: improve register allocation with indexable temporaries for VSMarek Olšák
Register allocation can now reallocate temporaries right after the last indexed source operand, instead of being disabled for the whole shader.
2010-09-04r300g: add a new debug option which disables compiler optimizationsMarek Olšák
Those are: - dead-code elimination - constant folding - peephole (mainly copy propagation) - register allocation There are some bugs which I need to track down. Also fix up the descriptions of all the debug options.
2010-09-04r300/compiler: compute the final number of temporaries during translationMarek Olšák
And not during the register allocation, which may be skipped for debugging purposes. Also the predicate register is now added to the number of temps.
2010-09-04r300/compiler: use peephole and constant folding for vertex shaders tooMarek Olšák
2010-09-04r300/compiler: add new compiler parameter max_constantsMarek Olšák
2010-09-04r300/compiler: refactor vertex shader compilationMarek Olšák
First list compiler passes in an array, then run the new function rc_run_compiler. Every backend may need a different set of passes. This cleans up the mess in r3xx_compile_vertex_program.
2010-09-04r300/compiler: remove a redundant parameter in rc_dataflow_deadcodeMarek Olšák
&c->Base == c.
2010-09-04r300/compiler: use null-terminated array of transformation functionsMarek Olšák
I need to reduce the number of parameters of each compiler pass function. This is part of a larger cleanup.
2010-09-04r300/compiler: add new compiler parameter max_alu_instsMarek Olšák
2010-09-04r300/compiler: put emulate_loop_state in radeon_compilerMarek Olšák
2010-08-25r300/compiler: emulate relative addressing with negative offsets in VSMarek Olšák
3 more piglits, cool.
2010-08-24r300/compiler: Silence uninitialized variable warning.Vinson Lee
The variable loops would be used uninitialized if it ever processed a RC_OPCODE_ENDLOOP case first. This patch initalizes the loops variable to NULL and adds an assert at the RC_OPCODE_ENDLOOP case that loops isn't NULL. Silence the following GCC warning. r3xx_vertprog.c: In function 'translate_vertex_program': r3xx_vertprog.c:469: warning: 'loops' may be used uninitialized in this function
2010-08-25r300/compiler: implement elimination of unused constantsMarek Olšák
Wine likes to create a *lot* of constants, exceeding the size of the constant file in hw.
2010-08-25r300/compiler: terminate vertex shader compilation immediately after an errorMarek Olšák
Also rename "compiler" to "c".
2010-08-25r300/compiler: fail to compile if we hit hw limits or an unimplemented featureMarek Olšák
i.e. relative addressing (mainly FS), saturate modifiers, exceeding the maximum number of constants.
2010-08-25r300/compiler: disable register allocation for indexable temporaries in VSMarek Olšák
If there is relative addressing of temporaries, we cannot change register indices, so skip register allocation entirely. To utilize register allocation at least partially, we need separate indexable and non-indexable register files in both TGSI and Mesa IR.
2010-08-10r300/compiler: Use predicate bit for IF statements in r500 vertex shadersTom Stellard
2010-08-10r300/compiler: Implement hardware assisted loops for vertex shaders.Tom Stellard
Single loops work, but nested loops do not.
2010-08-03r300/compiler: Always unroll loops when doing loop emulation.Tom Stellard
2010-08-03r300/compiler: r500 hw support for break and continue in loops.Tom Stellard
The BGNLOOP and ENDLOOP instructions are now being used correctly, which makes break and continue possible. The deadcode pass has been modified to handle breaks, and the compiler is more careful about which loops are unrolled.
2010-07-14r300/compiler: fix swizzling in the transformation of Abs modifiersMarek Olšák
2010-07-13r300/compiler: implement the Abs source operand modifier for vertex shadersMarek Olšák
2010-07-13r300/compiler: emulate SIN/COS/SCS in r3xx-r4xx vertex shadersMarek Olšák
Despite the docs, the corresponding hardware instructions are r5xx-only.
2010-07-03r300/compiler: Handle loops in deadcode analysis.Tom Stellard
This also allows us to split the loop emulation into two phases. A tranformation phase which either unrolls loops or prepares them to be emulated, and the emulation phase which unrolls remaining loops until the instruction limit is reached. The second phase is completed after the deadcode analysis in order to get a more accurate count of the number of instructions in the body of loops.
2010-06-23r300/compiler: allow 1024 instructions in r5xx vertex shadersMarek Olšák
2010-06-23r300/compiler: allow 32 temporaries in vertex shadersMarek Olšák
2010-06-23r300/compiler: emulate loops in vertex shadersMarek Olšák
It is not perfect, but it is the best we got.
2010-06-05r300/compiler: implement SIN+COS+SCS for vertex shadersMarek Olšák
2010-06-05r300/compiler: implement SNE unwound for r3xx VS, natively for r5xx VSMarek Olšák
2010-06-05r300/compiler: implement SEQ unwound for r3xx VS, natively for r5xx VSMarek Olšák
Fixes piglit/glsl-vs-vec4-indexing-4.
2010-06-03r300/compiler: print opcode names instead of numbersMarek Olšák
2010-04-19r300/compiler: enable branch emulation for vertex shadersMarek Olšák
2009-10-04r300/compiler: Refactor to allow different instruction typesNicolai Hähnle
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-10-03r300/compiler: Introduce control flow instructions and refactor dataflowNicolai Hähnle
Note that control flow instruction support isn't actually fully functional yet. Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-09-21Merge branch 'master' into r300-compilerNicolai Hähnle
There were additional non-textual conflicts. Conflicts: src/gallium/drivers/r300/r300_tgsi_to_rc.c src/mesa/drivers/dri/r300/compiler/r3xx_vertprog.c src/mesa/drivers/dri/r300/compiler/radeon_program.c src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c
2009-09-21r300: Zero-initialize register for NV_vertex_programNicolai Hähnle
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-09-06r300/compiler: New dataflow structures and passesNicolai Hähnle
This replaces the old NQSSADCE code with the same functionality, but quite different design. Instead of doing a single integerated pass, we now build explicit data structures representing the dataflow. This will enable analysis of flow control instruction, and could potentially open an avenue for several dataflow based optimizations, such as peephole optimization, fusing MUL+ADD to MAD, and so on.
2009-08-30r300: Remove all Mesa dependencies from the shader compilerNicolai Hähnle
In particular, this removes the dependency on prog_instruction, which unfortunately creates some code duplication, but also opens a path towards adding some hardware-specific things in there. Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-08-27r300: Debug messages are written to stderr, so fflush thatNicolai Hähnle
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-08-27r300/compiler: Fix vertex program MAD emitNicolai Hähnle
Only use the macro variant of MAD when absolutely necessary. Apparently it cannot deal with relative addressing. Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-07-27r300/compiler: Add vertex program code dumper from Gallium driverNicolai Hähnle
2009-07-27r300/vertprog: Move Mesa-dependent input/output handling out of compilerNicolai Hähnle
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-07-27r300: Remove ugly PSIZ hackNicolai Hähnle
Instead of setting Sourced, we simply force writemasks to begin with. Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-07-27r300/vertprog: Refactor wpos rewrite using rc_programNicolai Hähnle
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-07-27r300/vertprog: Refactor fog_as_texcoord to use rc_programNicolai Hähnle
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-07-27r300/vertprog: Refactor addArtificialOutputs to use rc_programNicolai Hähnle
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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