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Previously, presubtract operations where only being used by instructions
with less than three source source registers.
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Reads of registers that where not written to within the same block were
not being tracked. So in a situations like this:
0: IF
1: ADD t0, t1, t2
2: MOV t2, t1
Instruction 2 didn't know that instruction 1 read from t2, so
in some cases instruction 2 was being scheduled before instruction 1.
NOTE: This is a candidate for the 7.9 branch.
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Fixes this GCC warning with linux-x86 build.
radeon_pair_schedule.c: In function 'merge_presub_sources':
radeon_pair_schedule.c:312: warning: ISO C90 forbids mixed declarations and code
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It is possible for a single pair instruction arg to select from both an
RGB and an Alpha source.
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Fixes these GCC warnings on linux-x86 build.
radeon_pair_schedule.c: In function ‘emit_all_tex’:
radeon_pair_schedule.c:244: warning: ISO C90 forbids mixed declarations and code
radeon_pair_schedule.c: In function ‘destructive_merge_instructions’:
radeon_pair_schedule.c:291: warning: ISO C90 forbids mixed declarations and code
radeon_pair_schedule.c:438: warning: ISO C90 forbids mixed declarations and code
radeon_pair_schedule.c: In function ‘scan_read’:
radeon_pair_schedule.c:619: warning: ISO C90 forbids mixed declarations and code
radeon_pair_schedule.c: In function ‘scan_write’:
radeon_pair_schedule.c:645: warning: ISO C90 forbids mixed declarations and code
radeon_pair_schedule.c: In function ‘schedule_block’:
radeon_pair_schedule.c:673: warning: ISO C90 forbids mixed declarations and code
radeon_pair_schedule.c: In function ‘rc_pair_schedule’:
radeon_pair_schedule.c:730: warning: ISO C90 forbids mixed declarations and code
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https://bugs.freedesktop.org/show_bug.cgi?id=30415
NOTE: This is a candidate for the 7.9 branch.
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Use rc_pair_ prefix for all pair instruction structs
Create a named struct for pair instruction args
Replace structs radeon_pair_instruction_{rgb,alpha} with struct
radeon_pair_sub_instruction. These two structs were nearly identical
and were creating a lot of cut and paste code. These changes are the
first step towards removing some of that code.
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The r300 compiler can now emit instructions that select from the presubtract
source. A peephole optimization has been added to convert instructions like:
ADD Temp[0].x, none.1, -Temp[1].x into the INV (1 - src0) presubtract
operation.
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This cleans up the mess in r3xx_compile_fragment_program.
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The following instruction sequence will no longer be emitted in separate
TEX blocks:
0: TEX temp[0].xyz, temp[1].xy__, 2D[0];
1: TEX temp[1].xyz, temp[2].xy__, 2D[0];
This fixes fdo bug #25109
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Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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instructions
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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