Age | Commit message (Collapse) | Author |
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- remove unused variables
- silence compiler warnings
- fix twosided lighting
- fix point attenuation
- unify indentation
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Context destruction was nearly the same over all the drivers,
so collapse it down.
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Since core Mesa MAX_TEXTURE_LEVELS was bumped, we were incorrectly advertising
a maximum texture size of 4096 on older chips, causing corrupted menu text in
Extreme Tux Racer or Armagetron.
Also make sure our texture image array can actually hold all the mipmap levels
we support...
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Flush the VAP the first time for each state atom we upload new
VAP data
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This merges lots of the hw state atom emission and firevertices code.
it also removes a lot of the extra radeon crap from r300
and merge scissor
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this gets back a lot of the lots speed in gears on r500 at least
I also fixed the legacy bufmgr to deal when the dma space fills up
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we now get texrect + trivial textures working
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If DRI2 is enabled then switch cmd assembly to directly build
hw packet.
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This abstract memory management and command stream building so we
can use different backend either legacy one which use old pathway
or a new one like with a new memory manager. This works was done by :
Nicolai Haehnle
Dave Airlie
Jerome Glisse
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Makefile.template
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Share almost all code with r500_fragprog now.
This also fixes Piglit's texrect-many test, which means that the compiz
bicubic plugin should work with hardware acceleration now.
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Use an abstracted instruction scheduling and register allocation algorithm
that we will be able to share with r300_fragprog.
Unlike the original emit code, this code tries to pair instructions that
only use the RGB part of the ALU with instructions that only use the alpha
part. However, the pairing algorithm still has some shortcomings;
for example, it doesn't generate optimal code for the emulation of LIT.
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. There is both a per-texture unit and a per-texture object (at least for
OpenGL 1.4); this should now be supported properly.
. The LOD bias calculation in r300_state has been simplified and corrected
(need to multiply by 32 instead of 31, and ensure clamping)
. do not clamp LOD bias in TexEnv, as that behaviour conflicts with what
the spec says
. set Const.MaxTextureLodBias properly
. remove the no_neg_lod_bias property; if somebody can explain what
it's good for, we can add it back in, but according to Google, nobody
seems to use it
. removed some dead code and unused variables
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tests/bug_3195 doesn't render right, but at least it doesn't segfault this way.
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Yes, I know it's massive. Imagine how I felt, auditing 3000 lines of code.
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Refactor so that r300_pfs_compile_state "owns"/holds a pointer to
r300_fragment_program instead of the other way round. This is more natural from
an object orientation point of view.
Move the compiled hardware state into r300_fragment_program_code, in
anticipation of on-the-fly program recompilation based on external OpenGL
state.
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r500 code still used r300_pfs_compile_state, which contains some fields that
really only make sense on r3xx type hardware. In order to allow both fragprog
implementations to go forward without disturbing each other, I've pushed this
structure down into the respective r[3|5]00_fragprog.c
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This also fixes a bug with Zfunc set to GL_NEVER in glean/paths.
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This variable was only ever written to, but nobody used its value.
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Thanks to nh for the r3xx version.
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Setup fg_depth_src for depth writing programs and change early Z (ztop)
semantics.
Piglit's version of glean/fragprog test passes now (unlike Glean, its
dependency on EXT_fog_coord, which we don't support, is optional).
R3xx only at the moment, but should be straightforward to adapt to R5xx
(I don't own an R5xx, and I don't want to break anything.)
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Also remove some unused bits of the r500 fragprog struct
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Not sure if this is a good or bad plan, it certainly doesn't make things worse here.
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This is not the same as r3xx indexing. It only tries to protect inputs on
the pixel stack from getting clobbered by temps or texs.
Texs don't need special treatment since they read from special input regs
and write to the same temp regs as ALU/FC instructions.
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We don't appear to update max_temp_idx yet anywhere though
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Includes fallback shader and a handful of working opcodes.
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