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A call to radeon_prepare_render() at the beginning of draw
operations was placed too deep in the call chain,
inside r300RunRenderPrimitive(), instead of
r300DrawPrims() where it belongs. This leads to
emission of stale target color renderbuffer into the cs if
bufferswaps via page-flipping are used, and thereby causes
massive rendering corruption due to unsynchronized
rendering into the active frontbuffer.
This patch fixes such problems for use with the
upcoming radeon page-flipping patches.
Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
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Candidate for 7.8 branch
Signed-off-by: Maciej Cencora <m.cencora@gmail.com>
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This may break the SUNOS4 build, but it's no longer relevant.
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Fixes ut2004 warnings about overflowing command buffer.
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Conflicts:
src/mesa/drivers/dri/intel/intel_screen.c
src/mesa/drivers/dri/intel/intel_swapbuffers.c
src/mesa/drivers/dri/r300/r300_emit.c
src/mesa/drivers/dri/r300/r300_ioctl.c
src/mesa/drivers/dri/r300/r300_tex.c
src/mesa/drivers/dri/r300/r300_texstate.c
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Signed-off-by: Dave Airlie <airlied@redhat.com>
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This moves the bo mapping outside the DMA layer and makes it explicit,
this should in theory make it simpler to split the clean up the dma/cmdbuf
linkage that I created before that is broken.
Tested on: r600, rv380 (tcl/no-tcl), rv200 (tcl/no-tcl)
Signed-off-by: Dave Airlie <airlied@redhat.com>
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Prediction code making too small prediction may cause space check aserttion
failure later in rendering. So warning about any failure to predict correctly
should be fixed.
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r600_state_predict
Conflicts:
src/mesa/drivers/dri/r300/r300_cmdbuf.c
src/mesa/drivers/dri/radeon/radeon_cmdbuf.h
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All rendering is checked in r300PredictTryDrawPrimsSize which mamde these calls useless.
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Trying to make understanding code easier with small refactoring and renaming.
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We do flush for cmd buffer in case there isn't enough space left for whole
rendering operation. This protects dma regions from getting released in middle
of state emit.
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
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This makes it easier to predict size of next rendering operation so we
can do early flush.
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We keep dma buffer objects in list untill they have been unused for many
draw operations. Current limit of having 100 flushes is just guess for
good performance/memory trade off.
Moving WARN_ONCE macro to common context because it is used in multiple drivers.
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
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Move to common code base so radeon/r200 can add support for this.
Make OQ start a state emitted like all normal state, and make no-tcl
flushing work in proper places.
Really need a generic post emit space reservation mechanism like max_state
so we can reserve some space for the emit
this code passes demos/arbocclude, piglit occlusion query and
glean occlusion query with TCL and NO-TCL on my rv530.
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TODO:
- use proper interface for checking if bo is idle when it's available
- disable ZTOP only when needed
- make it work under KMS
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Hopefully this gets the ordering correct so the space checks don't fail.
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Based on Maciej's code, just fixed up the alignments for INDX_BUFFER
ut2004 runs AS-Convoy
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Conflicts:
src/mesa/drivers/dri/r300/r300_draw.c
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Revert to previous behaviour of dropping to big render operations.
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Copy elements directly to DMA bo to get rid of one memcpy, and prepare for using VBOs for index buffer.
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This saves mapping the index buffer to get a bounds on the indices that
drivers just drop on the floor in the VBO case (cache win), saves a bonus
walk of the indices in the CheckArrayBounds case, and other miscellaneous
validation. On intel it's a particularly a large win (50-100% in my app)
because even though we let the indices stay in both CPU and GPU caches, we
still end up waiting for the GPU to be done with the buffer before reading
from it.
Drivers that want the min/max_index fields must now check index_bounds_valid
and use vbo_get_minmax_index before using them.
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This is just the first step of refactoring. The separation is not yet
clean enough with this commit.
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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Reported-by: Nicolai Hähnle <nhaehnle@gmail.com>
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Stride == 0 means that we value for first vertex should be copied to every other vertices (e.g. constant color).
This fixes glean/vertProg1 and sauerbraten with enabled shaders.
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The problem is if we find out later we don't have any cmdbuf space but
we've already written the arrays to the DMA buffer object, we end up
emitting the current cmdbuf which has references to the current DMA object
we then send that to the hw and we can't reference the arrays we just emitted
to the old DMA buffer. things go bad, crash boom.
This can probably be tuned further + swtcl probably needs some fixes
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- don't limit vertex count if we are using indices
- max indices count is 65535 not 65536
- remove some comments that don't apply anymore
- remove unreachable code
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This lets ut2004 avoid hitting the elt warning.
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Signed-off-by: Maciej Cencora <m.cencora@gmail.com>
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Also when index format is GL_UBYTE, convert it to GL_USHORT not GL_UINT.
Fix license header too.
Reported by: Nicolai Hähnle <nhaehnle@gmail.com>
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