Age | Commit message (Collapse) | Author |
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The coordinates need to be computed after we've got the hw lock.
Code updated to:
1. Ignore all/x/y/width/height/ params passed to Clear func.
2. Pass 0,0,0,0,0 to _swrast_Clear() until they're totally removed.
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Remove unused macro
Replace LOCAL_VAR, PREFIX*
Indent code
Remove radeon redundant CP type 3 packet
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tests/stencilwrap and ut2k4 adrenaline pills.
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request at least drmMinor 6 anyway.
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Lots of changes, and fixes for some badness on my behalf.
1. Disposable data used during fp compile is now per-context,
rather than per-program to save memory.
2. Track usage of INPUT/TEMP registers from Mesa program, free
them when no longer required so the hw temps can be re-used.
3. Changed LAST_NODE to OUTPUT_COLOR (see r300_reg.h)
4. Implemented remaining ARB_f_p instructions, with the exception
of the trig/LIT opcodes.
5. Treat ZERO/ONE swizzles the same way as other native swizzles.
6. emit_arith changes, basically a complete re-write. Should
produce cleaner instructions, but no real functional changes.
internal reg -> hw reg routines shared with emit_tex. A bit
messy still.
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Changes to current operation:
-Elts are no longer converted to 16-bit format
-Cube maps
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Emit wait idle and pacify r300 before emitting state - this seems to improve stability.
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- Calculate tc_count in EmitArrays (enabled units != nr texcoords).
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near time.
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The DRM is responsible for emitting this quiescence sequence when
appropriate.
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but it seems to work
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Reflex from mesa demos doesn't work
TODO - double side stencil
I hope that I didn't break anything
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waiting for the engine to idle. There's no way for another buffer to
become free anyway once the engine is idle.
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tuxracer should render correctly. Immediate path was left enabled.
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problems with initial zbias...
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clears and other things not to work. This bug can be triggered by extending struct r300_hw_state by two struct r300_state_atom's from its current size. Everything zbs and unk42B4 related is now covered with HAVE_ZBS and GA ifdefs. Who wants to fix it? Not i. :)
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mode colorbuffer clears are still mysticly broken by offsets... Maybe we need to merge zbs and unk42B4 together?
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Change Polygon.OffsetFill from fallback to warn once.
Quake demo now works, modulo texture rendering issues due to absent pixel shader pipeline.
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Looks like the matter of texture formats is a lot simpler, with the wrong
display in quake explained by the fact that we are not handling texture combine modes.
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in the r300_run_immediate_render function.
Bumps up glxgears fps count by about 100 points.
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This can be tested with lesson19 from NeHe.
This has also shown that the alpha code does not work - we pick up a red tint
for transparent pixels somewhere.
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* move proven code into the r300_state.c
* update ClearBuffer to cope with more dynamic state
* cleanup !
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Hook it up, so lesson06 displays red colored textures.
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- Install custom (though inactive) pipeline
- Track depth test and culling state in hardware registers
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- Color buffer clear is accelerated, but flickers (possibly caused by a
recent DDX or Mesa change or bad merge)
- Everything else uses software fallback rendering
- There should be no clipping-related artifacts with the
sw-clipspan-fixes.patch against Mesa (posted on dri-devel)
- Multiple clients should be rock solid with a DDX patch that is soon to
come (soon = within the next hour or so)
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