Age | Commit message (Collapse) | Author |
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When a DRI2 swap buffer is pending we need to make sure we
have the flush extension so radeon doesn't resume rendering to
or reading from the not yet blitted front buffer.
This fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=28341
https://bugs.freedesktop.org/show_bug.cgi?id=28410
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
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This reverts commit 8446f257b3e3ca4a3eb2c79bc357e46343e04e87.
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When DRI2 swap buffer is pending (copy buffer not pageflipping)
we need to make sure we have the flush extension so radeon doesn't
resume rendering on the not yet blitted front buffer.
Modified version of Jerome's patch to add flush extension
in the correct place.
This prepares a possible fix for:
https://bugs.freedesktop.org/show_bug.cgi?id=28341
https://bugs.freedesktop.org/show_bug.cgi?id=28410
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
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Fixes progs/demos/shadowtex under KMS
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Fixes #27521, broken menus in UT2004 and broken water refraction in Sauerbraten.
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r600_state_predict
Conflicts:
src/mesa/drivers/dri/r300/r300_cmdbuf.c
src/mesa/drivers/dri/radeon/radeon_cmdbuf.h
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All rendering is checked in r300PredictTryDrawPrimsSize which mamde these calls useless.
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Move to common code base so radeon/r200 can add support for this.
Make OQ start a state emitted like all normal state, and make no-tcl
flushing work in proper places.
Really need a generic post emit space reservation mechanism like max_state
so we can reserve some space for the emit
this code passes demos/arbocclude, piglit occlusion query and
glean occlusion query with TCL and NO-TCL on my rv530.
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Split vbo rendering when the number of elements requested
by drawarrays is bigger than 65536.
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TODO:
- use proper interface for checking if bo is idle when it's available
- disable ZTOP only when needed
- make it work under KMS
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Based on Maciej's code, just fixed up the alignments for INDX_BUFFER
ut2004 runs AS-Convoy
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Revert to previous behaviour of dropping to big render operations.
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Copy elements directly to DMA bo to get rid of one memcpy, and prepare for using VBOs for index buffer.
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This doesn't remove software TCL path - so RS480 and RS690 work as before.
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random output is bad
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- don't limit vertex count if we are using indices
- max indices count is 65535 not 65536
- remove some comments that don't apply anymore
- remove unreachable code
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This lets ut2004 avoid hitting the elt warning.
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vertices
When with memory manager we need to make sure the GPU won't try to access
beyond vertex buffer size, do so by enforcing that the maximun index is the
last vertex of the buffer.
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Signed-off-by: Maciej Cencora <m.cencora@gmail.com>
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software TCL path
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Until now falling back to software rasterizer worked only for TCL enabled cards.
For non TCL cards we used to plug our rendering functions in r300InitSwtcl, and we had never restored original functions for software rasterizer.
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- move extensions init into seperate function
- move options handling into seperate function
- create new structure to hold options values
- use context->options.hw_tcl_enabled field instead of global hw_tcl_on and future_hw_tcl_on variables
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Use proper fields for marking if fp is translated, and if is translated succesfully.
Now if fp gets translated (even unsuccesfully) fp->translated is true. If the translation failed (i.e. because we exceeded limit of
maximum texture indirections) the fp->error is set. With a little updated fallback function it prevents non native fragment programs
from beeing translated with every frame (the translation would fail anyway so there's no point to try again).
Also implement IsProgramNative function for GL_FRAGMENT_PROGRAM_ARB (it should give some performance boost in apps that checks if
program is native and falls back to simpler shader to meet hw limits if necessary) and cleanup indentation (remove whitespaces on empty
lines).
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Context destruction was nearly the same over all the drivers,
so collapse it down.
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this is a step towards fbos and should fix pageflipping, but
I think the first flip seems broken.
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Conflicts:
configure.ac
src/mesa/drivers/dri/r200/r200_context.c
src/mesa/drivers/dri/r300/r300_render.c
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This merges lots of the hw state atom emission and firevertices code.
it also removes a lot of the extra radeon crap from r300
and merge scissor
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this gets back a lot of the lots speed in gears on r500 at least
I also fixed the legacy bufmgr to deal when the dma space fills up
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