Age | Commit message (Collapse) | Author |
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Swtcl calls flush everytime primitive changes so prediction has to made again
after flushing.
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We were check command buffer sizes too alte so allocated dma regions
were freed before relocations so space checking failed.
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We keep dma buffer objects in list untill they have been unused for many
draw operations. Current limit of having 100 flushes is just guess for
good performance/memory trade off.
Moving WARN_ONCE macro to common context because it is used in multiple drivers.
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
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Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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The copy is still needed because some program transforms add state variables
or constants.
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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This is in preparation of sharing the fragment program compiler with Gallium:
Compiler code is moved into its own directory and modified so that it no
longer depends on driver structures.
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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Rewrite vertex and fragment programs so that we don't have to do any hacks on lower level.
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We shouldn't use i variable for SWTCL_OVM_TEX because textures doesn't have to be enabled in "packed" order.
We could have tex1,tex3 and fog which would receive 7,9,8 OVM locations instead of 6,7,8.
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Fixes GPU hangs in software TCL path
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Until now falling back to software rasterizer worked only for TCL enabled cards.
For non TCL cards we used to plug our rendering functions in r300InitSwtcl, and we had never restored original functions for software rasterizer.
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Routing <4 components may lead to lock up.
Thanks to Alex Deucher for suggestion.
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add 1D texture case and setup default Q value to 1.0
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- remove unused fields
- remove unused defines and macros
- flatten one structure
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HW TCL path currently assumed fog, WPOS order. The order was inverted for SW TCL path.
This hopefully fixes rest of fog and WPOS related bugs.
Additionally fix some indentation, don't route unnecessary components of fog coordinates for performance reasons and simplify vertex
attribute emitting for SW TCL path.
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Fix wrong attribute emit and revert to previous behaviour of calculating VAP_OUT_VTX_FMT_1 register value.
We can't use r300VAPOutputCntl1 function because it assumes that all texture coords have 4 components and that is the case for HW TCL
path, but not for SW TCL.
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Conflicts:
src/mesa/drivers/dri/r200/r200_tex.c
src/mesa/drivers/dri/r300/r300_cmdbuf.c
src/mesa/drivers/dri/r300/r300_context.h
src/mesa/drivers/dri/r300/r300_swtcl.c
src/mesa/drivers/dri/r300/r300_tex.c
src/mesa/drivers/dri/r300/r300_texmem.c
src/mesa/drivers/dri/r300/r300_texstate.c
src/mesa/drivers/dri/radeon/radeon_tex.c
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- remove unused variables
- silence compiler warnings
- fix twosided lighting
- fix point attenuation
- unify indentation
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- remove disabled code
- silence compiler warnings (uinitialized values)
- remove unneeded code
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Conflicts:
src/mesa/drivers/dri/r300/r300_cmdbuf.c
src/mesa/drivers/dri/r300/r300_state.c
src/mesa/drivers/dri/r300/r300_swtcl.c
src/mesa/drivers/dri/r300/radeon_ioctl.c
src/mesa/drivers/dri/radeon/radeon_screen.c
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Also cleanup sw tcl vertex buffer setup
Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
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This merges lots of the hw state atom emission and firevertices code.
it also removes a lot of the extra radeon crap from r300
and merge scissor
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this gets back a lot of the lots speed in gears on r500 at least
I also fixed the legacy bufmgr to deal when the dma space fills up
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If DRI2 is enabled then switch cmd assembly to directly build
hw packet.
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This abstract memory management and command stream building so we
can use different backend either legacy one which use old pathway
or a new one like with a new memory manager. This works was done by :
Nicolai Haehnle
Dave Airlie
Jerome Glisse
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Makefile.template
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We really need to update the shader state so the texrect parameters work.
This should fix compiz looking crappy on rs480 and rs690
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This gets non-tcl cards working again on this branch..
at least texrect and glxgears
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