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There's really no need for two negation fields. This came from the
GL_NV_fragment_program extension. The new, unified Negate bitfield applies
after the absolute value step.
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Testing and regression fixes by Markus Amsler
Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
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in insert_wpos.
fixes bug 15447
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This bug was introduced by commit 978145a075255ae153ee05c2a037400e61558079.
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names.
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The PVS_VECTOR_OPCODE macro should be modified to support macro instructions,
too.
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The VE_MULTIPLY_ADD has further restrictions on reading temporary memory which
may complicate things. See AMD's documentation.
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This opcode is likely a mistake from reverse engineering. MAD_2 isn't included
in AMD's documentation, and my testing reviles there is no problem using the
documented MAD opcode.
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eg: #include "shader/program.h" and remove -I$(TOP)/src/mesa/program
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Construct the vertprog instruction in the 4 DWORD parts...
DWORD 0: Opcode and Output.
DWORD 1: First Argument.
DWORD 2: Second Argument.
DWORD 3: Third Argument.
Allow the opcode translation functions to generate more than one instruction;
useful for when an instruction must be emulated. FLR, XPD, etc.
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I'm not completely sure this is correct; it restores the old behaviour.
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