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Move all the metaops to a dri_metaops file and port radeon/intel
to use the new common meta ops code.
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Fixes those formats in fbo_firecube.
Only tested with r300, radeon and r200 compile tested only.
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Fixes fgl_glxgears and progs/demos/fbotexture after pressing 'c'.
Tested with r300, radeon and r200 compile tested only.
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Components of input attributes that are used by fragment program aren't part of vertex program key, and that may lead to situations when vertex program writes only TEX1.xy and fragment program reads TEX1.xyz, resulting in rendering errors.
Reported-by: Nicolai Hähnle <nhaehnle@gmail.com>
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We only care about the actual fogcoord itself now, reducing the rewriting
done for the vertex program.
The rewriting of source operand swizzles in the fragment program takes
care that fogcoord.yzw = 001.
This should fix fogcoord rewriting entirely, which had been horribly
broken in the face of dot-product instructions, and just broken (though
not horribly so) in the face of almost every other instruction (the W
component would be incorrect for most arithmetic instructions).
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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Split initializations becase the vars are of different type.
Reported-by: Nicolai Hähnle <nhaehnle@gmail.com>
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Reported-by: Nicolai Hähnle <nhaehnle@gmail.com>
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Reported-by: Nicolai Hähnle <nhaehnle@gmail.com>
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Reported-by: Nicolai Hähnle <nhaehnle@gmail.com>
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Reported-by: Nicolai Haehnle <nhaehnle@gmail.com>
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We don't have check which attributes are used by fragment program - it's already done by NQSSADCE.
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We need to keep unpaired program for vertex program NQSSADCE.
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Rewrite vertex and fragment programs so that we don't have to do any hacks on lower level.
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Prepare for wpos and fogc handling rewrite.
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Keep the original vertex program untouched because it may be needed after some state change for generating new r300 specific vertex program.
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random output is bad
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Stride == 0 means that we value for first vertex should be copied to every other vertices (e.g. constant color).
This fixes glean/vertProg1 and sauerbraten with enabled shaders.
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The problem is if we find out later we don't have any cmdbuf space but
we've already written the arrays to the DMA buffer object, we end up
emitting the current cmdbuf which has references to the current DMA object
we then send that to the hw and we can't reference the arrays we just emitted
to the old DMA buffer. things go bad, crash boom.
This can probably be tuned further + swtcl probably needs some fixes
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This moves a big chunk of the space checking code into libdrm so
it can be shared by the DDX.
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- don't limit vertex count if we are using indices
- max indices count is 65535 not 65536
- remove some comments that don't apply anymore
- remove unreachable code
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half stealing the code without taking the intel regions
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I suspect this might break TFP in some way but it makes firecube run here
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Add all source files that are symlink'ed from common radeon code to the
ignore list.
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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still always enable max, but the right values this time.
More work should probably be done for saner limits without mm, and/or
dri conf option allow_large_textures (which is ignored) removed.
3D limit on r100 is pretty arbitrary as still handled by swrast anyway.
Also fix r300 limits (except 3d I've no idea what the max is anyway so
keep using mesa default).
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Conflicts:
src/mesa/drivers/dri/i915/i915_tex_layout.c
src/mesa/drivers/dri/i965/brw_wm_glsl.c
src/mesa/drivers/dri/intel/intel_buffer_objects.c
src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
src/mesa/drivers/dri/intel/intel_pixel_draw.c
src/mesa/main/enums.c
src/mesa/main/texstate.c
src/mesa/vbo/vbo_exec_array.c
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Fixes #22181. R200 requires this since DP4 is used in hw tnl mode.
R300 prefers it (should be faster due to no instruction dependencies), but
both methods should be correct (when sw tcl is used though, MUL/MAD might
be faster). Probably doesn't make much difference for R100 since vertex progs
are executed in software anyway, but let's just keep it the same there too.
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Fixes #22181. R200 requires this since DP4 is used in hw tnl mode.
R300 prefers it (should be faster due to no instruction dependencies), but
both methods should be correct (when sw tcl is used though, MUL/MAD might
be faster). Probably doesn't make much difference for R100 since vertex progs
are executed in software anyway, but let's just keep it the same there too.
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This lets ut2004 avoid hitting the elt warning.
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vap index offset is programmed to 0 by the kernel, it
would add work to kernel checker to allow userspace
programming of this so it's now disallowed with CS
on KMS.
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Tested with glean/texture_srgb and wine/d3d9 tests on RV535
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