Age | Commit message (Collapse) | Author |
|
Fixes these GCC warnings with linux-x86 build.
radeon_emulate_branches.c: In function ‘handle_if’:
radeon_emulate_branches.c:65: warning: ISO C90 forbids mixed declarations and code
radeon_emulate_branches.c:71: warning: ISO C90 forbids mixed declarations and code
radeon_emulate_branches.c: In function ‘handle_else’:
radeon_emulate_branches.c:94: warning: ISO C90 forbids mixed declarations and code
radeon_emulate_branches.c: In function ‘handle_endif’:
radeon_emulate_branches.c:201: warning: ISO C90 forbids mixed declarations and code
radeon_emulate_branches.c: In function ‘fix_output_writes’:
radeon_emulate_branches.c:267: warning: ISO C90 forbids mixed declarations and code
radeon_emulate_branches.c:284: warning: ISO C90 forbids mixed declarations and code
radeon_emulate_branches.c: In function ‘rc_emulate_branches’:
radeon_emulate_branches.c:307: warning: ISO C90 forbids mixed declarations and code
|
|
https://bugs.freedesktop.org/show_bug.cgi?id=30415
NOTE: This is a candidate for the 7.9 branch.
|
|
https://bugs.freedesktop.org/show_bug.cgi?id=30416
NOTE: This is a candidate for the 7.9 branch.
|
|
https://bugs.freedesktop.org/show_bug.cgi?id=30415
NOTE: This is a candidate for the 7.9 branch.
|
|
|
|
|
|
|
|
rc_for_all_reads_src() and rc_pair_for_all_reads_arg() pass references to
instruction sources to the callback so they can be modified directly.
|
|
The driver actually creates a 3D texture aligned to POT and does all
the magic with texture coordinates in the fragment shader. It first
emulates REPEAT and MIRRORED wrap modes in the fragment shader to get
the coordinates into the range [0, 1]. (already done for 2D NPOT)
Then it scales them to get the coordinates of the NPOT subtexture.
NPOT textures are now less of a lie and we can at least display
something meaningful even for the 3D ones.
Supported wrap modes:
- REPEAT
- MIRRORED_REPEAT
- CLAMP_TO_EDGE (NEAREST filtering only)
- MIRROR_CLAMP_TO_EDGE (NEAREST filtering only)
- The behavior of other CLAMP modes is undefined on borders, but they usually
give results very close to CLAMP_TO_EDGE with mirroring working perfectly.
This fixes:
- piglit/fbo-3d
- piglit/tex3d-npot
|
|
Taking the W component from coords directly ignores swizzling. Instead,
take the component which is mapped to W in the TEX instruction parameter.
The same for Z.
NOTE: This is a candidate for the 7.9 branch.
|
|
NOTE: This is a candidate for the 7.9 branch.
|
|
NOTE: This is a candidate for the 7.9 branch.
|
|
Some random stuff I had here.
1) Fixed some misleading comments.
2) Removed fake_npot, since it's redundant.
3) lower_texture_rect -> scale_texcoords
4) Reordered and reindented some TEX transform code.
|
|
As per discussions at XDS.
|
|
1. We can't turn an instruction into a presubtract operation if it
writes to one of the registers it reads from.
2. If we turn an instruction into a presubtract operation, we can't
remove that intruction unless all readers can use the presubtract
operation.
This fixes fdo bug 30337.
This is a candidate for the 7.9 branch.
|
|
Use rc_pair_ prefix for all pair instruction structs
Create a named struct for pair instruction args
Replace structs radeon_pair_instruction_{rgb,alpha} with struct
radeon_pair_sub_instruction. These two structs were nearly identical
and were creating a lot of cut and paste code. These changes are the
first step towards removing some of that code.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
The r300 compiler can now emit instructions that select from the presubtract
source. A peephole optimization has been added to convert instructions like:
ADD Temp[0].x, none.1, -Temp[1].x into the INV (1 - src0) presubtract
operation.
|
|
This should fix bogus reports "Too many temporaries." and maybe some others.
|
|
This fixes glsl-fs-loop-nested.
|
|
Broken with commit d774b0c710bb7d833d17bd12f5151a0176baad96.
Reported by Chris Rankin.
|
|
|
|
|
|
Register allocation can now reallocate temporaries right after the last indexed
source operand, instead of being disabled for the whole shader.
|
|
|
|
|
|
|
|
Those are:
- dead-code elimination
- constant folding
- peephole (mainly copy propagation)
- register allocation
There are some bugs which I need to track down.
Also fix up the descriptions of all the debug options.
|
|
And not during the register allocation, which may be skipped for debugging
purposes. Also the predicate register is now added to the number of temps.
|
|
|
|
|
|
We use RC_OPCODE_REPL_ALPHA instead.
|
|
This cleans up the mess in r3xx_compile_fragment_program.
|
|
|
|
First list compiler passes in an array, then run the new function rc_run_compiler.
Every backend may need a different set of passes.
This cleans up the mess in r3xx_compile_vertex_program.
|
|
|
|
&c->Base == c.
|
|
I need to reduce the number of parameters of each compiler pass function.
This is part of a larger cleanup.
|
|
|
|
|
|
|