Age | Commit message (Collapse) | Author | |
---|---|---|---|
2010-08-25 | r300/compiler: terminate vertex shader compilation immediately after an error | Marek Olšák | |
Also rename "compiler" to "c". | |||
2010-08-25 | r300/compiler: fail to compile if we hit hw limits or an unimplemented feature | Marek Olšák | |
i.e. relative addressing (mainly FS), saturate modifiers, exceeding the maximum number of constants. | |||
2010-08-25 | r300/compiler: handle indexable temporaries correctly in deadcode elimination | Marek Olšák | |
2010-08-25 | r300/compiler: disable register allocation for indexable temporaries in VS | Marek Olšák | |
If there is relative addressing of temporaries, we cannot change register indices, so skip register allocation entirely. To utilize register allocation at least partially, we need separate indexable and non-indexable register files in both TGSI and Mesa IR. | |||
2010-08-16 | r300/compiler: implement DP2 opcode | Marek Olšák | |
2010-08-16 | r300/compiler: implement SSG opcode | Marek Olšák | |
2010-08-16 | r300/compiler: fix allocation of temporaries in radeonTransformTEX | Marek Olšák | |
2010-08-12 | r300/compiler: remove an unused variable | Marek Olšák | |
2010-08-11 | r300/compiler: Implement the CONT opcode. | Tom Stellard | |
2010-08-11 | r300/compiler: Handle loops in the register allocator. | Tom Stellard | |
2010-08-11 | r300g: implement gl_FrontFacing | Marek Olšák | |
2010-08-10 | r300/compiler: Use predicate bit for IF statements in r500 vertex shaders | Tom Stellard | |
2010-08-10 | r300/compiler: Implement hardware assisted loops for vertex shaders. | Tom Stellard | |
Single loops work, but nested loops do not. | |||
2010-08-10 | r300/compiler: Correctly transform nested loops. | Tom Stellard | |
2010-08-09 | radeon: Use MESA_FORMAT_SARGB8 for sRGB formats | Henri Verbeet | |
This can be supported on r600 without using the endian swapper, and is a better fit for (typical) uploads using GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV anyway. | |||
2010-08-07 | r300c: do not advertise half float vertex on RV3xx, RS4xx, RC4xx | Marek Olšák | |
Fixes a hardlock. NOTE: this is a candidate for the 7.8 branch, provided the half float vertex is really implemented there. | |||
2010-08-04 | r300/compiler: Remove unnecessary header. | Vinson Lee | |
2010-08-03 | r300/compiler: Always unroll loops when doing loop emulation. | Tom Stellard | |
2010-08-03 | r300/compiler: r500 hw support for break and continue in loops. | Tom Stellard | |
The BGNLOOP and ENDLOOP instructions are now being used correctly, which makes break and continue possible. The deadcode pass has been modified to handle breaks, and the compiler is more careful about which loops are unrolled. | |||
2010-08-03 | r300/compiler: KILP may not always be inside an IF statement. | Tom Stellard | |
2010-08-03 | r300/compiler: Don't unroll loops with continue or break. | Tom Stellard | |
2010-08-02 | radeon: Add DRI2 flush extension support, so we synchronize properly. | Mario Kleiner | |
When a DRI2 swap buffer is pending we need to make sure we have the flush extension so radeon doesn't resume rendering to or reading from the not yet blitted front buffer. This fixes: https://bugs.freedesktop.org/show_bug.cgi?id=28341 https://bugs.freedesktop.org/show_bug.cgi?id=28410 Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de> | |||
2010-08-02 | Revert "radeon: Add DRI2 flush extension to so we synchronize properly." | Jerome Glisse | |
This reverts commit 8446f257b3e3ca4a3eb2c79bc357e46343e04e87. | |||
2010-08-02 | radeon: Add DRI2 flush extension to so we synchronize properly. | Mario Kleiner | |
When DRI2 swap buffer is pending (copy buffer not pageflipping) we need to make sure we have the flush extension so radeon doesn't resume rendering on the not yet blitted front buffer. Modified version of Jerome's patch to add flush extension in the correct place. This prepares a possible fix for: https://bugs.freedesktop.org/show_bug.cgi?id=28341 https://bugs.freedesktop.org/show_bug.cgi?id=28410 Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de> | |||
2010-07-14 | r300/compiler: fix swizzling in the transformation of Abs modifiers | Marek Olšák | |
2010-07-13 | r300/compiler: implement the Abs source operand modifier for vertex shaders | Marek Olšák | |
2010-07-13 | r300/compiler: emulate SIN/COS/SCS in r3xx-r4xx vertex shaders | Marek Olšák | |
Despite the docs, the corresponding hardware instructions are r5xx-only. | |||
2010-07-11 | r300c: Fix vertex data setup for named buffer objects with unaligned offset | Maciej Cencora | |
Candidate for 7.8 branch Signed-off-by: Maciej Cencora <m.cencora@gmail.com> | |||
2010-07-08 | r300/compiler: Add a register rename pass. | Tom Stellard | |
This pass renames register in order to make it easier for the pair scheduler to group TEX instructions together. This fixes fdo bug #28606 | |||
2010-07-08 | r300/compiler: Fix scheduling of TEX instructions. | Tom Stellard | |
The following instruction sequence will no longer be emitted in separate TEX blocks: 0: TEX temp[0].xyz, temp[1].xy__, 2D[0]; 1: TEX temp[1].xyz, temp[2].xy__, 2D[0]; This fixes fdo bug #25109 | |||
2010-07-06 | r300/compiler: Implement KILP opcode. | Tom Stellard | |
Signed-off-by: Marek Olšák <maraeo@gmail.com> | |||
2010-07-03 | r300/compiler: Fix loop unrolling | Tom Stellard | |
2010-07-03 | r300/compiler: Use hardware flow control instructions for loops on r500. | Tom Stellard | |
2010-07-03 | r300/compiler: Don't continue copy propagation inside loops. | Tom Stellard | |
2010-07-03 | r300/compiler: Print debug info for flow control instructions. | Tom Stellard | |
2010-07-03 | r300/compiler: Enable hardware IF statements for r500 cards. | Tom Stellard | |
2010-07-03 | r300/compiler: In the peephole optimizer, ELSE should mark the end of a | Tom Stellard | |
block. | |||
2010-07-03 | r300/compiler: Correctly calculate the max number of iterations for loops. | Tom Stellard | |
2010-07-03 | r300/compiler: Handle loops in deadcode analysis. | Tom Stellard | |
This also allows us to split the loop emulation into two phases. A tranformation phase which either unrolls loops or prepares them to be emulated, and the emulation phase which unrolls remaining loops until the instruction limit is reached. The second phase is completed after the deadcode analysis in order to get a more accurate count of the number of instructions in the body of loops. | |||
2010-06-23 | Merge branch 'shader-file-reorg' | Brian Paul | |
1. Move all GL entrypoint functions and files into src/mesa/main/ This includes the ARB vp/vp, NV vp/fp, ATI fragshader and GLSL bits that were in src/mesa/shader/ 2. Move src/mesa/shader/slang/ to src/mesa/slang/ to reduce the tree depth 3. Rename src/mesa/shader/ to src/mesa/program/ since all the remaining files are concerned with GPU programs. 4. Misc code refactoring. In particular, I got rid of most of the GLSL-related ctx->Driver hook functions. None of the drivers used them. Conflicts: src/mesa/drivers/dri/i965/brw_context.c | |||
2010-06-23 | r300/compiler: allow 1024 instructions in r5xx vertex shaders | Marek Olšák | |
2010-06-23 | r300/compiler: allow 32 temporaries in vertex shaders | Marek Olšák | |
2010-06-23 | r300/compiler: emulate loops in vertex shaders | Marek Olšák | |
It is not perfect, but it is the best we got. | |||
2010-06-12 | r300/compiler: fix scons build | Joakim Sindholt | |
2010-06-11 | r300/compiler: Handle more complex conditionals in loops. | Tom Stellard | |
2010-06-11 | r300/compiler: Fix warning. | Tom Stellard | |
2010-06-11 | r300/compiler: Handle SGT and SLE at the beginning of loops. | Tom Stellard | |
2010-06-11 | r300/compiler: Verify assumptions about opcode types. | Tom Stellard | |
2010-06-11 | r300/compiler: Unroll loops that decrement the counter. | Tom Stellard | |
e.g. for(i=10; i>0; i--) | |||
2010-06-11 | r300/compiler: Unroll loops that have a constant number of iterations. | Tom Stellard | |
This only works with for loops that increment the counter. e.g. for(i=0; i<10; i++) |