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Always call driFlipRenderbuffers() with pfCurrentPage value, in case it's
initially 1 instead of 0. May fix some issues with pageflip, the same fix was
applied to r128, radeon and r200 (6e0e6eff05727ac8833c2b2dffc51c6619427e77).
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Fixes https://bugs.freedesktop.org/show_bug.cgi?id=10417 .
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As far as we know, the hardware prefers outputs packed tightly together
with no holes caused by outputs that are not even read by the fragment
program. Therefore, we slightly rewrite vertex programs in this case.
It would be interesting to test this interaction between vertex programs
and fragment programs further, because some of that rewrite may be
unnecessary. However, play it safe for now and don't change the current
behaviour.
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The texture_rectangle fix introduced a bug where every texture instruction
caused a new indirection.
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R300 hardware takes texcoords in the range 0..1 even for rectangle
textures. Previously, the necessary texcoord conversion was applied
to the texture coordinate during vertex processing in a render stage.
This is obviously wrong when fragment programs are used, which can
calculate arbitrary coordinates for TEX instructions. Therefore,
we now inject an appropriate MUL instruction before a TEX that
reference a rectangle texture.
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There used to be an assertion when a fragment program accesses an incomplete
texture image. Work around this assertion.
Note: I am unsure whether this workaround produces the desired result
(0,0,0,1) on all hardware.
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When no textures were enabled, a KIL instruction triggered an assertion
in r300_setup_rs_unit.
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The index is no longer necessary to share constants between multiple
SIN/COS/SCS instructions inside a single fragment program, and storing
a tiny implementation detail like this in the fragment_program structure
itself was just nasty.
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The constant/parameter allocation was significantly simplified, removing
one unnecessary copy operation of parameters. The dirty state tracking is
unchanged and far from optimal, since all state is always re-fetched.
Constants and parameters are now emitted only once, which significantly
reduces the resource pressure on larger programs.
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Also, fix a typo in a related comment.
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Make sure that instruction slots are fully initialized with NOPs during
find_and_prepare_slot(). This fixes a bug when a fragment program was
translated more than once (e.g. due to a second call to glProgramStringARB).
This partially fixes glean/fragProg1.
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This is a necessary change to emit the right instructions when writing
to result.depth.
However, even with this test, Z-write doesn't work properly, and I don't
fully understand why. In addition to this, we'll at least have to disable
early-Z, but even that doesn't seem to be enough.
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Fix a bug in the LIT implementation (clamp exponent to 128, not 0.5)
and change the implementation around. In theory, the new implementation
needs as little as 5 instruction slots. Unfortunately, the dependency
analysis in find_and_replace_slot is not strong enough to look at
individual components of a register yet.
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Do not move an instruction that writes to a temp forward past an instruction
that reads the same temporary.
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Dumps of fragment programs were incorrect when the program consisted of multiple
nodes.
Also, improved the formatting a bit.
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There were a number of bugs related to the pairing of vector and scalar
operations where swizzles ended up using the wrong source register,
or an instruction was moved forward and ended up overwriting an aliased
register.
The new algorithm for register allocation is quite conservative and may
run out of registers before necessary. On the plus side, It Just Works.
Pairing is done whenever possible, and in more cases than before, so
in practice this change should be a net win.
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Note that insert_wpos in r300_vertexprog.c is still a little flaky and could be
improved.
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corrections.
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enough information is known about them to be sure as to what the values mean.
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Note that just like the values written to R300_RB3D_DSTCACHE_CTLSTAT these
values are really unknown; ideally more reverse engineering should be done to
determine what these values mean and when they should be set.
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R300_RB3D_DSTCACHE_02 or R300_RB3D_DSTCACHE_0A, rather than hexadecimal values.
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(Oliver McFadden)
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ialization code.
Note that there are still plenty of actual unknown variables left that should
probably be deciphered.
There are a number of things incomplete in the driver; the different polygon
offset modes (line, point, etc), the other texture filter, texture chroma key,
etc. These should probably be fixed in the future, or at least added to the TODO
list.
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Conflicts:
src/mesa/main/context.c
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And set new cliprects before deriving other state from them. This ensures
cliprects aren't accessed after having been freed.
Thanks to Panagiotis Papadakos for testing various iterations of this.
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Based on a patch by Panagiotis Papadakos.
Among other things, this makes sure the framebuffer object associated with the
drawable has the correct size when _mesa_make_current is called, so the default
viewport is set up correctly.
Also update radeon->lastStamp in radeonSetCliprects.
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