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add 1D texture case and setup default Q value to 1.0
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ae_create_context is called by vbo_CreateContext
ae_invalidate_state is called by vbo_InvalidateState
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According to r300_reg.h from radeon drm module 0x4f30 is ZB_ZMASK_OFFSET.
Also cleanup as trailing whitespaces.
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r300SetEarlyZState is called during r300UpdateShaderStates which is called for every rendering operation.
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reuse insert_WPOS_trailer function
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- remove unused fields
- remove unused defines and macros
- flatten one structure
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- move constant values initialization to seperate function
- remove obvious comments
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Use proper fields for marking if fp is translated, and if is translated succesfully.
Now if fp gets translated (even unsuccesfully) fp->translated is true. If the translation failed (i.e. because we exceeded limit of
maximum texture indirections) the fp->error is set. With a little updated fallback function it prevents non native fragment programs
from beeing translated with every frame (the translation would fail anyway so there's no point to try again).
Also implement IsProgramNative function for GL_FRAGMENT_PROGRAM_ARB (it should give some performance boost in apps that checks if
program is native and falls back to simpler shader to meet hw limits if necessary) and cleanup indentation (remove whitespaces on empty
lines).
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Report and regression testing by Fabio Pedretti.
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There's really no need for two negation fields. This came from the
GL_NV_fragment_program extension. The new, unified Negate bitfield applies
after the absolute value step.
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HW TCL path currently assumed fog, WPOS order. The order was inverted for SW TCL path.
This hopefully fixes rest of fog and WPOS related bugs.
Additionally fix some indentation, don't route unnecessary components of fog coordinates for performance reasons and simplify vertex
attribute emitting for SW TCL path.
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Fix wrong attribute emit and revert to previous behaviour of calculating VAP_OUT_VTX_FMT_1 register value.
We can't use r300VAPOutputCntl1 function because it assumes that all texture coords have 4 components and that is the case for HW TCL
path, but not for SW TCL.
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Conflicts:
src/mesa/drivers/dri/r200/r200_tex.c
src/mesa/drivers/dri/r300/r300_cmdbuf.c
src/mesa/drivers/dri/r300/r300_context.h
src/mesa/drivers/dri/r300/r300_swtcl.c
src/mesa/drivers/dri/r300/r300_tex.c
src/mesa/drivers/dri/r300/r300_texmem.c
src/mesa/drivers/dri/r300/r300_texstate.c
src/mesa/drivers/dri/radeon/radeon_tex.c
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- remove unused variables
- silence compiler warnings
- fix twosided lighting
- fix point attenuation
- unify indentation
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this make gnome shell run
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This fixes up the buffer validation scheme, so that we keep a list
of buffers to validate so cmdbuf flushes during a pipeline get
all the buffers revalidated on the next emit.
This also fixes radeonFlush to not flush unless we have something
useful to send to the GPU, like a DMA buffer or something not state
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Context destruction was nearly the same over all the drivers,
so collapse it down.
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This might trip up some serious FBO users, will have to see, but
it avoids the slow paths for all the demos I have.
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- remove disabled code
- silence compiler warnings (uinitialized values)
- remove unneeded code
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Fixes Sun cc error:
"r300_cmdbuf.c", line 142: invalid cast expression
Signed-off-by: Alan Coopersmith <alan.coopersmith@sun.com>
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Since core Mesa MAX_TEXTURE_LEVELS was bumped, we were incorrectly advertising
a maximum texture size of 4096 on older chips, causing corrupted menu text in
Extreme Tux Racer or Armagetron.
Also make sure our texture image array can actually hold all the mipmap levels
we support...
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Re work depth issues.
Do a lot more FBO abstactions
fixup depth/stencil buffer interactions
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