Age | Commit message (Collapse) | Author |
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when we dont know max_index we cannot calculate vb size from count
anymore - just use the bo size.
Also added an assert to remind that we dont handle GL_INT GL_DOUBLE
upload when we dont' know max_index - will fix later
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use VTX_BASE_VTX_LOC for offset, last time using INDEX_OFFSET was
probably a wrong register for this
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seems hw can do unaligned accesses and unaligned strides
removes extra conversion when using vbo's
however I needed to switch 3 component byte format to 4 component formats
for tests to pass. Somewhat sililar to GL_SHORT fix done earlier
removes assert and gains +2 piglit especially draw-vertices
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When a DRI2 swap buffer is pending we need to make sure we
have the flush extension so radeon doesn't resume rendering to
or reading from the not yet blitted front buffer.
This fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=28341
https://bugs.freedesktop.org/show_bug.cgi?id=28410
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
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This reverts commit 8446f257b3e3ca4a3eb2c79bc357e46343e04e87.
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When DRI2 swap buffer is pending (copy buffer not pageflipping)
we need to make sure we have the flush extension so radeon doesn't
resume rendering on the not yet blitted front buffer.
Modified version of Jerome's patch to add flush extension
in the correct place.
This prepares a possible fix for:
https://bugs.freedesktop.org/show_bug.cgi?id=28341
https://bugs.freedesktop.org/show_bug.cgi?id=28410
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
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This fixes the sw fallback for GL_SELECT picking modes.
Fixes object picking blender + depthpick test
http://bugs.freedesktop.org/show_bug.cgi?id=26419
Signed-off-by: Dave Airlie <airlied@redhat.com>
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PRE_EMIT_STATE_BUFSZ accounts for the start 3d, idle, cd/db flush
not for state. The relocs for CB_COLOR0_FRAG & CB_COLOR0_TILE
are part of the render target state.
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This may break the SUNOS4 build, but it's no longer relevant.
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We don't need to flush so often. Next step
would be to move the flushing to the drm and only
flush after each command buffer rather than each
draw.
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the new relocation for CB_COLOR0_FRAG & CB_COLOR0_TILE add 4
dwords to the default command stream. Increase the prediction
default size to take this into account
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This moves the bo mapping outside the DMA layer and makes it explicit,
this should in theory make it simpler to split the clean up the dma/cmdbuf
linkage that I created before that is broken.
Tested on: r600, rv380 (tcl/no-tcl), rv200 (tcl/no-tcl)
Signed-off-by: Dave Airlie <airlied@redhat.com>
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- consolidate DB render setup
- only enable perfect ZPASS counts and cull disable
when OQ is active
- enable early Z
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Seems INDX_OFFSET doesn't work properly on some cards,
so change back to immediate mode indices. Seems to only
affect DRI1. Needs more investigation.
Rework and clean up the draw functions.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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also seems we can use INDX_OFFSET if start != 0
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Stride is set already in r700SetVertexFormat and there it works
correctly for 0 also
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no longer used now that the hw supports this natively.
Also, clean up some formatting.
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Shaders and IB need to be updated and allocated before
calling validatebuffers.
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Patch from taiu on IRC. fixes bug 23585
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There is only a few functions that have debugging enabled now.
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r600_state_predict
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Prediction code making too small prediction may cause space check aserttion
failure later in rendering. So warning about any failure to predict correctly
should be fixed.
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r600_state_predict
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Spotted by airlied.
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switches more state handling to common code. We need
should be more fine grained with the state atoms
eventually.
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Slowing migrating to atom based system like
the other radeon drivers.
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We probably want to go finer grained eventually, but
this is a good start.
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fixes corruption issues with apps like teapot and
geartrain.
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make sure we allocate enough space for relocs
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