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path: root/src/mesa/drivers/dri/r600
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2009-12-21radeon/r600: use new libdrm_radeon apiDave Airlie
2009-12-18r600 : enable gl2, set R600_ENABLE_GLSL_TEST by default.Richard Li
2009-12-18radeon: fix frontbuffer read/drawpixelsDave Airlie
Bug 25699 The main problem was the optimising flush wasn't doing the front rendering checks properly.
2009-12-17r600: move structs for legacy cmdbuf into cmdbuf C file.Dave Airlie
these really shouldn't be exposed here
2009-12-16r600 : clean a bit to prepare to enable gl2.Richard Li
2009-12-15r600: use _mesa_insert_instructions to fixup wpos instead of manual ins insertAndre Maasikas
this keeps branch targets correct. glsl/trirast works correctly now afaics
2009-12-15r600: fix typos for vert-texAndre Maasikas
at least i think this is how it was meant to work
2009-12-15r600: fix fragment.positionAndre Maasikas
wpos.y seems inferted to what opengl expexts, so calculate correct value from window dimension and replace references in fragmentprog with calculated value
2009-12-15r600: add support for FRAG_ATTRIB_PNTCAndre Maasikas
2009-12-15r600: add DDX DDY opcodesAndre Maasikas
2009-12-14r600 : add texture support for vertex shader.Richard Li
2009-12-11Merge branch 'mesa_7_7_branch'Brian Paul
Conflicts: src/gallium/state_trackers/xorg/xorg_xv.c src/mesa/drivers/dri/intel/intel_span.c
2009-12-11Merge branch 'mesa_7_6_branch' into mesa_7_7_branchBrian Paul
2009-12-09r600 : add pre-compile mesa shader calling interface, in order to handleRichard Li
complex built-in shader instructions.
2009-12-09r600: fix state size prediction after dc0777d3Andre Maasikas
2009-12-08r600: and finally fix SCSAndre Maasikas
2009-12-08r600: remove (now) dead codeAndre Maasikas
2009-12-08r600: fix SIN alsoAndre Maasikas
2009-12-08r600: use the new inline constants feature to fix COSAndre Maasikas
2009-12-08r600: add assembler support for literal(inline) constantsAndre Maasikas
and use it in cubemap instruction sequence for testing
2009-12-08r600: merge alu_instruction/alu_instruction2Andre Maasikas
2009-12-08r600: add ABS support for source regs to assemblerAndre Maasikas
use it in tex cube instruction sequence
2009-12-08r600: glsl - allow specifying texture sampler via uniformsAndre Maasikas
looks kinda hackish, should rethink later
2009-12-08r600: implement FRAG_ATTRIB_FACE, glsl/twoside worksAndre Maasikas
2009-12-08r600: quick hack to get KIL_NV working - does condition TR only for nowAndre Maasikas
2009-12-08r600: wip glsl - refactor conditional instructions a bitAndre Maasikas
remember the dst register which is used for cond updates when it's time to use the cond codes issue a separate PRED instruction
2009-12-08r600: execute SET funtions on all channelsAndre Maasikas
seems assemble_LOGIC was meant for non-condition-code instructions so execute in for all components as previously
2009-12-08Merge branch 'mesa_7_7_branch'Andre Maasikas
Conflicts: src/mesa/drivers/dri/r600/r700_assembler.c src/mesa/main/version.h
2009-12-08Merge branch 'mesa_7_6_branch' into mesa_7_7_branchAndre Maasikas
2009-12-08r600: add support for TXB instructionAndre Maasikas
makes testing other things easier - does not hang the card TODO: enable TEX dependency tracking in vertex programs
2009-12-08r600: reorder state for render_target and blendAndre Maasikas
First time around render targets are not enabled yet (done in r700SendRenderTargetState) so blend state is not emitted for any targets. Affects first glClear in some mesa tests. As a quick fix reorder state emit so that target is set first
2009-12-05radeon/r200/r600: fix drivers for changes in ↵Alex Deucher
433f0a82f5a4696e6b0c4061f645485ec8079bb4
2009-11-29r600 : clena up a bit for last commit.Richard Li
2009-11-29r600 : add read port allocation for uniform;Richard Li
mapping ps input based on vs output; fix bugs including constants updating for vs.
2009-11-25r600: add ARB_texture_non_power_of_two support.Dave Airlie
This makes the miptree rounds up to the near POT for each level for all radeons, however since mipmaps aren't support with NPOT on previous radeons this calculation shouldn't cause any problems. If it does we can just make it r600 only. I tested a few mipmap demos on r500 and they all seem to work. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-11-24r600 : reset stack flag with one channel only.Richard Li
2009-11-24r600 : fix stack depth setting bug.Richard Li
2009-11-24radeon/r200/r300/r600: make bo mapping be explicitDave Airlie
This moves the bo mapping outside the DMA layer and makes it explicit, this should in theory make it simpler to split the clean up the dma/cmdbuf linkage that I created before that is broken. Tested on: r600, rv380 (tcl/no-tcl), rv200 (tcl/no-tcl) Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-11-22r600 : add support for shader instruction trunc and discard.Richard Li
2009-11-23r600: hopefully fix segfault.Dave Airlie
2009-11-23r600: fix inline issuesDave Airlie
2009-11-22r600 : add stack depth calculation, enable CF pop.Richard Li
2009-11-22r600 : use cf for all pop now, left optimization for future.Richard Li
2009-11-20r600 : eliminate Wondows line ending for test code.Richard Li
2009-11-20Merge remote branch 'origin/mesa_7_7_branch'Dave Airlie
2009-11-19r600 : Clean up a bit test code mess.Richard Li
2009-11-19r600 : change shader pop method for now.Richard Li
2009-11-19r600 : check in shader code test enable flag: if flagRichard Li
R600_ENABLE_GLSL_TEST defined, IL shader code will goto r600 assembler. The test base is /mesa/progs/glsl/brick, and changes shader code in CH06-brick.frag/vert to test different logic op combination. (if,else,while,function,...). The stack depth code is not in yet, so it is hard coded now. So complex code would not run (such as things like 8 loops embeded loop in loop).
2009-11-18r600 : update PS and VS emit count for loop constants.Richard Li
2009-11-18r600 : add some defsRichard Li
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