Age | Commit message (Collapse) | Author |
|
to make kernel cs checker happier, last attribs don't need full stride of
space. Calculate as count-1*stride + size of attrib
|
|
normalized seems to work with this setting.
|
|
Oops, I n00bed it.
|
|
This hides the assertion failure in glean/fbo test. Underlying
problem when same texture is set twice to different attachments
will cause assertion.
|
|
This used to take GLX tokens, but the DRI interface can't depend on GLX
defines. We fix this by introducing DRI tokens that have the same value
as the GLX texture format tokens.
|
|
Fixes glActiveTexture to set GL_INVALID_ENUM when trying
to activate texture unit that is not available.
piglit test case general/texunit passes now.
|
|
GL_TRUE indicates that the driver accepts the program.
GL_FALSE indicates the program can't be compiled/translated by the
driver for some reason (too many resources used, etc).
Propogate this result up to the GL API: set GL_INVALID_OPERATION
error if glProgramString() was called. Set shader program link
status to GL_FALSE if glLinkProgram() was called.
At this point, drivers still don't do any program checking and
always return GL_TRUE.
|
|
We don't need to flush so often. Next step
would be to move the flushing to the drm and only
flush after each command buffer rather than each
draw.
|
|
|
|
|
|
|
|
also clarify some other const values.
|
|
|
|
same variable used for 2 different temp registers
fixes e.g. glsl/bump
|
|
Conflicts:
src/gallium/auxiliary/draw/draw_context.c
src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline.c
src/gallium/auxiliary/pipebuffer/Makefile
src/gallium/auxiliary/pipebuffer/SConscript
src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c
src/gallium/auxiliary/tgsi/tgsi_scan.c
src/gallium/drivers/i915/i915_surface.c
src/gallium/drivers/i915/i915_texture.c
src/gallium/drivers/llvmpipe/lp_setup.c
src/gallium/drivers/llvmpipe/lp_tex_sample_c.c
src/gallium/drivers/llvmpipe/lp_texture.c
src/gallium/drivers/softpipe/sp_prim_vbuf.c
src/gallium/state_trackers/xorg/xorg_dri2.c
src/gallium/winsys/drm/intel/gem/intel_drm_api.c
src/gallium/winsys/drm/nouveau/drm/nouveau_drm_api.c
src/gallium/winsys/drm/radeon/core/radeon_drm.c
src/gallium/winsys/drm/vmware/core/vmw_screen_dri.c
src/mesa/state_tracker/st_cb_clear.c
|
|
bits, settings derived from testing, might contain some errors...
|
|
fixes piglit depth_clamp
|
|
fixes some fbo cases (mipmaps, cube textures ..)
|
|
They do not build for a long while and there seems to be no active
users. It might be better for them to live in the git histroy.
|
|
Signed-off-by: Alan Coopersmith <alan.coopersmith@sun.com>
Signed-off-by: Brian Paul <brianp@vmware.com>
|
|
|
|
Pitch here means aligned width, not aligned width * bpp.
|
|
In preperation for texcopy code sharing.
|
|
|
|
|
|
based on Maciej's r300 patch.
|
|
as per 46dc6fd3ed5ef96cda53641a97bc68c3bc104a9f
|
|
|
|
the new relocation for CB_COLOR0_FRAG & CB_COLOR0_TILE add 4
dwords to the default command stream. Increase the prediction
default size to take this into account
|
|
FRAG & TILE buffer are unused but still they need
to be associated with a valid relocation so that
userspace can't try to abuse them to overwritte
GART and then try to write anywhere in system
memory.
|
|
rtype enums are different, DST_REG_OUTPUT got SRC_REG_CONSTANT in some
shaders and produced invalid output/hang
as TEX output is temp register always set out src to SRC_REG_TEMPORARY
|
|
|
|
- fill in more src/dst formats
- disable depth copies for now
- set proper data formats in render target regs
- fill in additional default state
The swizzles on some of the less used mesa formats
are probably wrong.
|
|
|
|
Unfinished.
|
|
|
|
|
|
|
|
Conflicts:
src/mesa/drivers/dri/i965/brw_wm_emit.c
|
|
R600_OUT_BATCH_RELOC doesn't really use offset so set it
in TEX_RESOURCE2
+ typo fix
|
|
The ordering of texture components was
backwards for the floating point textures.
Signed-off-by: Pierre Ossman <pierre@ossman.eu>
|
|
* remove-intel-dri1:
intel: intelScreenContext() is no longer used
intel: Remove remaining dri2.enabled tests
intel: Drop more cliprect bookkeeping
intel: Remove struct intel_framebuffer
intel: Remove client-side vblank code
intel: Drop intelWindowMoved()
intel: Drop batchbuffer cliprect_mode tracking
intel: Drop DRI1 static regions
intel: Use depth buffer from ctx.DrawBuffer in copypix_src_region()
intel: Drop LOCK/UNLOCK_HARDWARE()
intel: Drop DRI1 SwapBuffer implementation
intel: Drop DRI1 CopySubBuffer implementation
intel: Drop DRI1 support
Push __driDriverExtensions out of dri_util.c and into the drivers
Remove leftover __DRI{screen,drawable,context}Private references
Check for libdrm_$chipset.pc when needed
|
|
R600_OUT_BATCH_RELOC doesn't really use offset so set it
in TEX_RESOURCE2
+ typo fix
|
|
|
|
When we have integer-valued texture formats, the texture border color
must also store integer and uint values.
With GL 3.0, the new glTexParameterIiv() and glTexParameterIuiv() functions
can set the border color to int or uint values.
|
|
Use vertex program key mechanism and swizzle during vertex fetch - is there
a better way?
|
|
As part of the DRI driver interface rewrite I merged __DRIscreenPrivate
and __DRIscreen, and likewise for __DRIdrawablePrivate and
__DRIcontextPrivate. I left typedefs in place though, to avoid renaming
all the *Private use internal to the driver. That was probably a
mistake, and it turns out a one-line find+sed combo can do the mass
rename. Better late than never.
|
|
Use vertex program key mechanism and swizzle during vertex fetch - is there
a better way?
|
|
This is part of the GL_EXT_draw_buffers2 extension and part of GL 3.0.
The ctx->Color.ColorMask field is now a 2-D array. Until drivers are
modified to support per-buffer color masking, they can just look at
the 0th color mask.
The new _mesa_ColorMaskIndexed() function will be called by
glColorMaskIndexedEXT() or glColorMaski().
|
|
This is a little more logical. Suggested in bug report 25654.
|