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This makes the miptree rounds up to the near POT for each level for
all radeons, however since mipmaps aren't support with NPOT on previous
radeons this calculation shouldn't cause any problems. If it does
we can just make it r600 only.
I tested a few mipmap demos on r500 and they all seem to work.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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This moves the bo mapping outside the DMA layer and makes it explicit,
this should in theory make it simpler to split the clean up the dma/cmdbuf
linkage that I created before that is broken.
Tested on: r600, rv380 (tcl/no-tcl), rv200 (tcl/no-tcl)
Signed-off-by: Dave Airlie <airlied@redhat.com>
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R600_ENABLE_GLSL_TEST defined, IL shader code will goto r600 assembler.
The test base is /mesa/progs/glsl/brick, and changes
shader code in CH06-brick.frag/vert to test different logic op
combination. (if,else,while,function,...). The stack depth code is not
in yet, so it is hard coded now. So complex code would not run (such as
things like 8 loops embeded loop in loop).
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It's not implemented yet. fixes fdo bug 24047
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Let the hw decide (early vs late Z)
fixes fdo bug 25092
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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These are needed for HiZ which is not currently used and
the _BASE reg requires a reloc which is not currently supported
in the drm.
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- consolidate DB render setup
- only enable perfect ZPASS counts and cull disable
when OQ is active
- enable early Z
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These are needed for HiZ which is not currently used and
the _BASE reg requires a reloc which is not currently supported
in the drm.
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Seems INDX_OFFSET doesn't work properly on some cards,
so change back to immediate mode indices. Seems to only
affect DRI1. Needs more investigation.
Rework and clean up the draw functions.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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This improves shadowtex since the component ordering
is at least correct now, but I'm not sure how to
deal with texturing from a depth surface yet due to
differences in depth and color tile layouts.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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also seems we can use INDX_OFFSET if start != 0
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Conflicts:
src/mesa/drivers/dri/radeon/radeon_fbo.c
src/mesa/drivers/dri/s3v/s3v_tex.c
src/mesa/drivers/dri/s3v/s3v_xmesa.c
src/mesa/drivers/dri/trident/trident_context.c
src/mesa/main/debug.c
src/mesa/main/mipmap.c
src/mesa/main/texformat.c
src/mesa/main/texgetimage.c
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Based on initial patch from Stephan Schmid <stephan_2303@gmx.de>.
Basic idea is to dump the zpass count at the start and end of the query
and subtract to get the total number of visible fragments. HW writes
alternating qwords for up to 4 DBs. On the first pass, we start at
buffer address + 0; on the second pass, we start at buffer address + 8
(bytes). The resulting buffer at the end of the query looks like:
qw[0]: db0 start
qw[1]: db0 end
...
qw[6]: db3 start
qw[7]: db3 end
The MSB of each qword is the valid bit and the lower 63 bits are
the zpass count for that DB.
OQ on RV740 is disabled at the moment as it only seems to report
results for half of its DBs. This needs further investigation.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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Call the ctx->Driver.ChooseTextureFormat() function from core Mesa's
_mesa_[Copy]TexImage functions instead of in the driver functions.
One less thing for drivers to do.
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This enables the remap table in core. driInitExtensions is adapted to
use the remap table. All uses of extension_helper.h are replaced by
remap_helper.h. The chicken-egg problem of the DRI drivers is also
solved.
It is now also possible to pass NULL extensions to driInitExtensions.
It will cause driInitExtensions to map all known functions. This
functionality is used by software drivers and EGL_i915.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
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Stride is set already in r700SetVertexFormat and there it works
correctly for 0 also
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at this point
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Make it more consistent with other radeon drivers.
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git+ssh://agd5f@git.freedesktop.org/git/mesa/mesa
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otherwise
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Also avoids empty shader for "END" - seems to be somewhat valid fp
Maybe this can be done differently in the future (fake FRAG_RESULT_COLOR
already in Map_Fragment_Program() or is there a way to program the chip
to not hang in case of no exports.
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