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path: root/src/mesa/drivers/dri/radeon/radeon_common_context.c
AgeCommit message (Collapse)Author
2009-07-14radeon: port more front fixes from intel.Dave Airlie
Port fixes to read buffer from front.
2009-07-02radeon/r200/r300: drop radeon renderbuffer private width/heightDave Airlie
half stealing the code without taking the intel regions
2009-06-27radeon: Always initialize front and back renderbuffers if presentNicolai Hähnle
This fixes an assertion in glReadPixels from the front buffer. Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-06-01radeon: Provide a more detailled GL_RENDERER string.Nicolai Hähnle
Display the chip family and PCI ID. This can be parsed easily, and essentially all information that the driver has about the chip can be deduced from it. Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-05-24radeon: Remove drawable & readable from radeon_dri_mirrorNicolai Hähnle
The duplication of state data caused a crash due to double-free on destruction of context, because a variable wasn't correctly null'ed out. Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
2009-05-20radeon: Increase reference count of current renderbuffers.Michel Dänzer
Fixes glxinfo: main/renderbuffer.c:2159: _mesa_reference_renderbuffer: Assertion `oldRb->Magic == 0xaabbccdd' failed.
2009-05-12radeon: avoid segfault in radeon_update_renderbuffers() if using DRI1Tormod Volden
Basically the same as 43d9020ff1e975e7f4f9480d9ef24f0b9fb2141f for intel. Bug 21688. Signed-off-by: Tormod Volden <debian.tormod@gmail.com>
2009-05-10radeon: add support for new dri2 interfaces & fix single buffer renderingJoel Bosveld
2009-05-04r300: set proper texture row alignment for IGP chipsMaciej Cencora
Looks like r400 based IGP chips require 64 byte alignment
2009-04-02radeon/r200/r300: fix up the whole buffer space checking.Dave Airlie
This fixes up the buffer validation scheme, so that we keep a list of buffers to validate so cmdbuf flushes during a pipeline get all the buffers revalidated on the next emit. This also fixes radeonFlush to not flush unless we have something useful to send to the GPU, like a DMA buffer or something not state
2009-04-02radeon/common: use glCtx not ctxDave Airlie
2009-04-02radeon/r200/r300: collapse context destruction down to a common path.Dave Airlie
Context destruction was nearly the same over all the drivers, so collapse it down.
2009-04-01radeon: fixup render buffer cleanupsDave Airlie
this fixes qtdemo-qt4 starting and a leak in glxgears exit
2009-03-31radeon/dri2: if the depth buffer is 16-bit force cpp == 2Dave Airlie
This is because the DDX always allocates using the drawable sizes. which gives me twice the depth buffer I asked for, dumb.
2009-03-24radeon/r200/r300: fix warningsDave Airlie
2009-03-24radeon/r200/r300: set the texture depth correctly for DRI2Dave Airlie
2009-03-23raedon/r200/r300: mega-FBO commits.Dave Airlie
Re work depth issues. Do a lot more FBO abstactions fixup depth/stencil buffer interactions
2009-03-19radeon/r200/r300: cleanup some of the renderbuffer codeDave Airlie
2009-03-09r300: move firevertices out into the main place its needed.Dave Airlie
This fixes a hang on context destruction on rs690
2009-03-04radeon: fixup some segfaults/exit at startupDave Airlie
2009-03-03radeon: refactor framebuffer code like intelDave Airlie
this is a step towards fbos and should fix pageflipping, but I think the first flip seems broken.
2009-02-13radeon/r200/r300: make build again with tracker changesDave Airlie
2009-02-12radeon: renaming and headers cleanupDave Airlie