| Age | Commit message (Collapse) | Author |
|---|
|
This makes sure that objects are leaving wait list only when they are processed by gpu.
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
|
|
|
|
|
|
|
|
Trying to make understanding code easier with small refactoring and renaming.
|
|
|
|
We do flush for cmd buffer in case there isn't enough space left for whole
rendering operation. This protects dma regions from getting released in middle
of state emit.
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
|
|
This fixes some state atom check functions from returing wrong emit size.
There is emit code cleanup so that emit function selection is done in init
time instead of runtime.
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
|
|
- emit prediction
- fixes to emit_sizes for data
- clean up of excesive use of radeonEnsureCmdBufferSpace
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
|
|
Calling EnsureCmdBufSpace is not required because rendering pipeline has to quarentee free space.
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
|
|
This patch makes render emit size prediction count the corect maximum emit size
for state.
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
|
|
Patch adds prediction functionthat tries to predict emit size to the smallest
possible values that is quarenteed to be higher than worst case scenario in
rendering pipeline.
State emit size prediction code is in place but fix for emit sizes is included
in next patch.
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
|
|
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
|
|
|
|
switches more state handling to common code. We need
should be more fine grained with the state atoms
eventually.
|
|
We probably want to go finer grained eventually, but
this is a good start.
|
|
This fixes problem that dma buffers were leaking in dri1 mode.
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
|
|
|
|
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
|
|
This fixes problems when application is using large vertex arrays for drawing.
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
|
|
In radeonRefillCurrentDmaRegion() make sure we
unmap the previous buffer.
|
|
This allows us to return the unused portion of the dma buffer
to the allocator instead of wasting nearly 16k a pop.
Cherry picked and ported to new code by Pauli.
|
|
We keep dma buffer objects in list untill they have been unused for many
draw operations. Current limit of having 100 flushes is just guess for
good performance/memory trade off.
Moving WARN_ONCE macro to common context because it is used in multiple drivers.
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
|
|
|
|
Move to common code base so radeon/r200 can add support for this.
Make OQ start a state emitted like all normal state, and make no-tcl
flushing work in proper places.
Really need a generic post emit space reservation mechanism like max_state
so we can reserve some space for the emit
this code passes demos/arbocclude, piglit occlusion query and
glean occlusion query with TCL and NO-TCL on my rv530.
|
|
This stuff was a vestige of the r600 bring up and
now mostly serves to periodically break the build.
|
|
|
|
|
|
|
|
|
|
Conflicts:
src/mesa/drivers/dri/r300/r300_draw.c
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
|
|
|
|
Reference counting protects DRM lock call from recursive locking that would
cause hang. Code also adds optional debugging output for recursive call that
is compiled only if NDEBUG is not defined.
This code is not 100% thread safe because mesa doesn't include increment and
test atomic operation. There is built-in gcc functions but they are only
available from gcc 4.2.
|
|
NOTE: THIS REQUIRES AN UPDATED DRM!
|
|
|
|
|
|
|
|
|
|
Only really got good testing on r500 so far, need to enable in
DDX and play some more.
|
|
this should only really affect DRI2 since we mostly have a surface in DRI1.
I don't think this is perfect yet, but it is a better start than nothing.
|
|
another case of image never matching miptree in case of compressed textures
|
|
- fix not respecting required hardware stride with compressedTexImage -
this fixes #22615.
- make sure correct stride is used in various places
- fix stored miptree never matching with a TexImage call with compressed
texture
- don't always store data with compressedtexsubimage at offset 0,
and actually use the supplied pixel data... (untested)
- make sure rows for compressed texture handling are rounded up not down
Note that trying to access stored compressed textures in hardware miptrees
from core mesa (get_compressed_teximage, swrast fallbacks) can't work correctly,
since RowStride isn't really set to anything useful, plus some places (at least
get_compressed_teximage) assume this data has native stride and no padding.
|
|
(corresponding fix to the intel driver one)
|
